XRT83SL34 datasheet(9/80 Pages) EXAR

9 / 80 page

XRT83SL34

QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

PRELIMINARY

REV. P1.0.8

TRANSMITTER SECTIONS

SIGNAL NAME

PIN #TYPE

DESCRIPTION

TCLKE

µPTS2

107

Transmit Clock Edge - Hardware Mode

With this pin set to a "High", transmit input data of all channels are sampled at

the rising edge of TCLK_n. With this pin tied "Low", input data are sampled at

the falling edge of TCLK_n.

Microprocessor Type Select Input pin 2 - Host Mode

This pin along with

µPTS1 (pin 106) selects the microprocessor type. See

“Microprocessor Type Select Input Pins - Host Mode:” on page 9.

NOTE: This pin is internally pulled "Low" with a 50k

Ω resistor.

TTIP_0

TTIP_1

TTIP_2

TTIP_3

Transmitter Tip Output for Channel _0

Positive differential transmit output to the line.

Transmitter Tip Output for Channel _1

Transmitter Tip Output for Channel _2

Transmitter Tip Output for Channel _3

TRING_0

TRING_1

TRING_2

TRING_3

Transmitter Ring Output for Channel _0

Negative differential transmit output to the line.

Transmitter Ring Output for Channel _1

Transmitter Ring Output for Channel _2

Transmitter Ring Output for Channel _3

TPOS_0

TDATA_0

TPOS_1

TDATA_1

TPOS_2

TDATA_2

TPOS_3

TDATA_3

127

104

101

Transmitter Positive Data Input for Channel _0 - Dual-rail mode

This signal is the positive-rail input data for transmitter 0.

Transmitter 0 Data Input - Single-Rail mode

This pin is used as the NRZ input data for transmitter 0.

Transmitter Positive Data Input for Channel _1

Transmitter 1 Data Input

Transmitter Positive Data Input for Channel _2

Transmitter 2 Data Input

Transmitter Positive Data Input for Channel _3

Transmitter 3 Data Input

NOTE: Internally pulled “Low” with a 50k

Ω resistor for each channels.

TNEG_0

CODES_0

TNEG_1

CODES_1

TNEG_2

CODES_2

TNEG_3

CODES_3

126

105

100

Transmitter Negative NRZ Data Input for Channel _0

Dual-Rail mode

This signal is the negative-rail input data for transmitter 0.

Single-Rail mode

This pin can be left unconnected.

Coding Select for Channel _0 - Hardware mode and Single-Rail mode

Connecting this pin "Low" enables HDB3 in E1 or B8ZS in T1 encoding and

decoding for Channel _0. Connecting this pin "High" selects AMI data format.

Transmitter Negative NRZ Data Input for Channel _1

Coding Select for Channel _1

Transmitter Negative NRZ Data Input for Channel _2

Coding Select for Channel _2

Transmitter Negative NRZ Data Input for Channel _3

Coding Select for Channel _3

NOTE: Internally pulled “Low” with a 50k

Ω resistor for channel _n

XRT83SL34 データシート(PDF) 9 Page - Exar Corporation

XRT83SL34 データシート(HTML) 9 Page - Exar Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

データシートダウンロード