VNF1048F datasheet(47/49 Pages) STMICROELECTRONICS

47 / 49 page

List of tables

Table 1.

Pin functions ....................................................................... 3

Table 2.

Absolute maximum ratings ............................................................. 4

Table 3.

Thermal data....................................................................... 5

Table 4.

Supply specification .................................................................. 5

Table 5.

SPI logic inputs (CSN, SCK, and SDI) specification ............................................ 6

Table 6.

SPI logic outputs (SDO) specification ...................................................... 6

Table 7.

HWLO logic input pin specification ........................................................ 6

Table 8.

DIAG logic output pin specification ........................................................ 6

Table 9.

Device thermal shutdown .............................................................. 6

Table 10.

ST-SPI timings specification ............................................................ 7

Table 11.

Charge pump specification ............................................................. 7

Table 12.

External FET gate driver specification...................................................... 7

Table 13.

Current sense amplifier with integrated ADC ................................................. 8

Table 14.

External FET VDS protection............................................................ 8

Table 15.

Hard short circuit protection............................................................. 9

Table 16.

Overcurrent protection ............................................................... 10

Table 17.

External FET thermal shutdown via NTC input ............................................... 11

Table 18.

Bypass switch ..................................................................... 12

Table 19.

VOUT A-to-D conversion .............................................................. 13

Table 20.

Command byte .................................................................... 23

Table 21.

Input data byte 1 ................................................................... 23

Table 22.

Input data byte 2 ................................................................... 23

Table 23.

Input data byte 3 ................................................................... 23

Table 24.

Global status byte .................................................................. 23

Table 25.

Output data byte 1 .................................................................. 24

Table 26.

Output data byte 2 .................................................................. 24

Table 27.

Output data byte 3 .................................................................. 24

Table 28.

Operating codes ................................................................... 24

Table 29.

0xFF: (SW_Reset) .................................................................. 26

Table 30.

Clear all status registers (RAM access).................................................... 27

Table 31.

Global status byte .................................................................. 27

Table 32.

Global status byte - bit description ....................................................... 27

Table 33.

RAM memory map .................................................................. 28

Table 34.

ROM memory map.................................................................. 29

Table 35.

CR#1: control register 1 (read/write); address 01h ............................................ 30

Table 36.

CR#2: control register 2 (read/write); address 02h ............................................ 31

Table 37.

CR#3: control register 3 (read/write); address 03h ............................................ 31

Table 38.

SR#1: status register 1; address 11h ..................................................... 32

Table 39.

SR#2: status register 2; address 12h ..................................................... 33

Table 40.

SR#3: status register 3; address 13h ..................................................... 34

Table 41.

SR#4: status register 4; address 14h ..................................................... 34

Table 42.

SR#5: status register 5; address 15h ..................................................... 34

Table 43.

SR#6: status register 6; address 16h ..................................................... 34

Table 44.

SR#7: status register 7; address 17h ..................................................... 35

Table 45.

SR#8: status register 8; address 18h ..................................................... 35

Table 46.

Component value................................................................... 40

Table 47.

QFN32L Epad (5.0x5.0x1.0 mm) package mechanical data...................................... 42

Table 48.

Document revision history ............................................................. 43

VNF1048F

List of tables

DS13084 - Rev 8

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