VNF1048F datasheet(21/49 Pages) STMICROELECTRONICS

21 / 49 page

5.5

Hard short circuit latch-off

The external MOSFET drain-source current is monitored by the control IC through the current sense amplifier,

which reads the voltage drop across a high-side shunt resistor. A hard short circuit shutdown of the MOSFET

occurs when the current sense voltage exceeds the preset threshold. In this case, both output stage and bypass

switch are turned off. The threshold can be set via SPI in the range from 20 mV to 160 mV.

The MOSFET is re-armed via SPI by clearing the HSHT latched fault bit.

VHSHT is converted by a dedicated ADC converter. The converted result is stored in the status register and can be

read via SPI.

This protection is not active in case the external MOSFET is in OFF state.

5.6

Current vs time latch-off

The external MOSFET drain-source current is monitored by the control IC through the current sense amplifier,

which reads the voltage drop across a high-side shunt resistor. The overload detection circuitry emulates the

response of a traditional fuse. An overcurrent shutdown of the MOSFET occurs when the current sense voltage

exceeds the preset threshold for longer than the preset time. In this case, both output stages and bypass switch

are turned off. The threshold can be set via SPI in the range 6 mV to 90 mV, while the nominal trip time can be

programmed in the range from 1 s to 511 s.

The MOSFET is re-armed via SPI by clearing the FUSE_LATCH latched fault bit. This protection is not active in

case the external MOSFET is in OFF state.

In case of hard short protection event occurrence, reported by the HSHT flag bit, the FUSE_LATCH bit is set as

well.

5.7

Low current bypass desaturation shutdown

Internal bypass switch VDS voltage (VS - VOUT) is monitored by the IC, to protect the switch from load current

sink changes.

A desaturation shutdown of the bypass occurs when its VDS exceeds a fixed threshold (~1.3 V); in this situation,

the bypass switch is turned off while the external FET is turned on through the HS_GATE output, directly by the

hardware, regardless of their software controlled bit status, in order to protect the bypass and provide the

requested current capability to the connected load.

This represents the so-called AUTO-ON event and it is flagged by bit #4 (AUTOON) of the global status byte that

corresponds to the BYPASS_SAT flag of status Register #1.

Bypass switch can be re-armed through SPI control by clearing the BYPASS_SAT fault latched bit.

This protection is not active in case the bypass switch is in OFF state.

A particular case is represented by standby wake-up event occurrence, with FSM state transition to wake up

state, due to bypass switch desaturation: only in this situation, in addition to the previously mentioned actions on

the bypass switch and external FET, the device signals, by driving the DIAG pin low, that it has been woken up by

the hardware event (load current increase), in order to allow host control to take proper actions.

It is important to notice that the bypass switch cannot be used to charge any type of load, even those requesting

small currents capability: on the contrary, it shall be used to keep powered application loads, previously charged

by external FET, when they switch to low-power consumption modes (that is, standby).

VNF1048F

Protections

DS13084 - Rev 8

page 21/49

VNF1048F データシート(PDF) 21 Page - STMicroelectronics

VNF1048F データシート(HTML) 21 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49

データシートダウンロード