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WM9090ECS/R データシート(PDF) 40 Page - Wolfson Microelectronics plc |
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WM9090ECS/R データシート(HTML) 40 Page - Wolfson Microelectronics plc |
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40 / 81 page ![]() WM9090 Production Data w PD, November 2010, Rev 4.1 40 Note that a ‘Dummy’ write can be inserted into a control sequence by commanding the sequencer to write a value of 0 to bit 0 of Register R255 (FFh). This is effectively a write to a non-existent register location. This can be used in order to create placeholders ready for easy adaptation of the sequence. For example, a sequence could be defined to power-up a mono signal path from IN1P and IN1N to headphone, with a ‘dummy’ write included to leave space for easy modification to a stereo signal path configuration. Dummy writes can also be used in order to implement additional time delays between register writes. Dummy writes are included in the Headphone Start-Up sequence - see Table 21. In summary, the Control Register to be written is set by the WSEQ_ADDR field. The data bits that are written are determined by a combination of WSEQ_DATA_START, WSEQ_DATA_WIDTH and WSEQ_DATA. This is illustrated below for an example case of writing to the VMID_RES field within Register R1 (01h). In this example, the Start Position is bit 01 (WSEQ_DATA_START = 0001b) and the Data width is 2 bits (WSEQ_DATA_WIDTH = 0001b). With these settings, the Control Write Sequencer would update the Control Register R1 [2:1] with the contents of WSEQ_DATA [1:0]. Figure 14 Control Write Sequencer Example DEFAULT SEQUENCES When the WM9090 is powered up, a number of Control Write Sequences are available through default settings in both RAM and ROM memory locations. The pre-programmed default settings comprise a Headphone Start-Up and a Generic Shut-Down sequence. Note that the start-up sequence does not include audio signal path or gain setting configuration; this must be implemented prior to scheduling the sequence. Also, the start-up sequence does not include configuration of the master bias. The user must enable the clock and the master bias by setting OSC_ENA and VMID_ENA prior to executing the start-up control sequence. These registers may be reset to 0 after executing the shut-down sequence. Index addresses 0 to 15 may be programmed to users’ own settings at any time, as described in “Programming a Sequence”. Users’ own settings remain in memory regardless of WSEQ_ENA, and are not affected by software resets (i.e. writing to Register R0). However, any non-default sequences are lost when the device is powered down. |
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