 |
データシートサーチシステム |
|
|
データシートサーチシステム |
|
WM9090ECS/R データシート(PDF) 24 Page - Wolfson Microelectronics plc |
|
|
|||||||||||||||||||||||||||||
WM9090ECS/R データシート(HTML) 24 Page - Wolfson Microelectronics plc |
|
|
24 / 81 page  WM9090 Production Data w PD, November 2010, Rev 4.1 24 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 7:6 IN1A_MIXOUTR_VOL [1:0] 00 IN1A to MIXOUTR volume control 00 = 0dB 01 = -6dB 10 = -9dB 11 = -12dB 5:4 IN1B_MIXOUTR_VOL [1:0] 00 IN1B to MIXOUTR volume control 00 = 0dB 01 = -6dB 10 = -9dB 11 = -12dB 3:2 IN2A_MIXOUTR_VOL [1:0] 00 IN2A to MIXOUTR volume control 00 = 0dB 01 = -6dB 10 = -9dB 11 = -12dB 1:0 IN2B_MIXOUTR_VOL [1:0] 00 IN2B to MIXOUTR volume control 00 = 0dB 01 = -6dB 10 = -9dB 11 = -12dB Table 9 Right Output Mixer (MIXOUTR) Control HEADPHONE OUTPUT VOLUME CONTROL The headphone output PGA controls are shown in Table 10. The HPOUT1_VU bits control the loading of the headphone PGA volume data. When HPOUT1_VU is set to 0, the volume control data will be loaded into the respective control register, but will not actually change the gain setting. The headphone PGA volume settings are both updated when a 1 is written to either HPOUT1_VU bit. This makes it possible to update the gain of the left and right output paths simultaneously. A zero-cross function is provided on the headphone output PGAs. Note that the timeout clock TOCLK must be enabled when using the zero-cross function. See “Clocking Control” for more information on the TOCLK control fields. When the zero-cross function is enabled (using HPOUT1L_ZC or HPOUT1R_ZC), it will only become effective after the respective PGA gain (or mute) has been changed in two or more subsequent register writes. To guarantee zero cross functionality, it is recommended to enable zero cross and toggle the respective mute (HPOUT1L_MUTE or HPOUT1R_MUTE) before enabling the headphone output. Alternatively, the zero-cross function can be ensured by updating the PGA gain register (HPOUT1L_VOL or HPOUT1R_VOL) in two successive register writes - decrementing then incrementing the setting by 1 gain step – after the zero-cross enable bits have been set. |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか？ [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Japanese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
