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WM9090ECS/R データシート(PDF) 28 Page - Wolfson Microelectronics plc |
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WM9090ECS/R データシート(HTML) 28 Page - Wolfson Microelectronics plc |
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28 / 81 page ![]() WM9090 Production Data w PD, November 2010, Rev 4.1 28 When the AGC applies signal attenuation triggered by the anti-clip threshold, the signal gain is reduced at a rate that is set by the AGC_CLIP_ATK register. When the anti-clip threshold is no longer met (due to the signal level reduction), then the AGC increases the signal gain at a rate set by the AGC_CLIP_DCY register. Note that, when the anti-clip and power limiting thresholds are both triggered concurrently, then the signal gain is reduced at the rate set by the AGC_CLIP_ATK register and is increased at the rate set by AGC_PWR_DCY. These fields are defined in Table 13 and Table 14 respectively. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R98 (62h) AGC Control 0 15 AGC_CLIP_ENA 1 Enable AGC Anti-Clip Mode 0 = Disabled 1 = Enabled 11:8 AGC_CLIP_THR [3:0] 0110 AGC Anti-Clip Threshold Sets the headroom between SPKPGA output and SPKVDD at which Anti-Clip limiting will be applied 0000 = -200mV 0001 = -150mV 0010 = -100mV 0011 = -50mV 0100 = 0mV 0101 = 50mV 0110 = 100mV 0111 = 150mV 1000 = 200mV 1001 = 250mV 1010 = 300mV 1011 = 400mV 1100 = 500mV 1101 = 600mV 1110 = 700mV 1111 = 800mV 6:4 AGC_CLIP_ATK [2:0] 100 AGC Anti-Clip Attack Rate Sets the rate of AGC gain reduction when clipping is detected 000 = 0.6ms/6dB 001 = 5.4ms/6dB 010 = 10.2ms/6dB 011 = 15.0ms/6dB 100 = 19.8ms/6dB 101 = 24.6ms/6dB 110 = 29.4ms/6dB 111 = 34.1ms/6dB 2:0 AGC_CLIP_DCY [2:0] 000 AGC Anti-Clip Decay Rate Sets the rate of AGC gain increments after a period of clipping 000 = 120ms/6dB 001 = 480ms/6dB 010 = 820ms/6dB 011 = 1170ms/6dB 100 = 1640ms/6dB 101 = 2050ms/6dB 110 = 2730ms/6dB 111 = 4100ms/6dB Table 13 AGC Anti-Clip Control |
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