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WM9090ECS/R データシート(PDF) 45 Page - Wolfson Microelectronics plc

部品番号 WM9090ECS/R
部品情報  Ultra Low Power Audio Subsystem
PDF  81 Pages
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メーカー  WOLFSON [Wolfson Microelectronics plc]
ホームページ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM9090ECS/R データシート(HTML) 45 Page - Wolfson Microelectronics plc

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Production Data
WM9090
w
PD, November 2010, Rev 4.1
45
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
2
HPOUT1R_OUTP
0
Enables HPOUT1R output stage
0 = Disabled
1 = Enabled
For pop-free operation, this bit should
be set to 1 after the DC offset
cancellation has been performed.
1
HPOUT1R_DLY
0
Enables HPOUT1R intermediate
stage
0 = Disabled
1 = Enabled
For pop-free operation, this bit should
be set to 1 after the output signal path
has been configured, and before the
DC Offset cancellation is scheduled
This bit should be set with at least
20us delay after HPOUT1L_ENA.
Table 26 Pop Suppression Control
RECOMMENDED HEADPHONE START UP SEQUENCE
Below is a recommended headphone start up sequence for suppressing pops.
Firstly program the following sequence into the Control Write Sequencer. For further details refer to
the ‘Programming a Sequence’ section.
WSEQ
INDEX
REGISTER
ADDRESS
WIDTH
START
DATA
DELAY
EOS
DESCRIPTION
0
(00h)
R76 (4Ch)
1 bits
Bit 15
01h
0h
0b
Enable Charge Pump
1
(01h)
R3 (03h)
2 bits
Bit 4
03h
0h
0b
Enable Output Mixers
2
(02h)
R46 (2Dh)
1 bits
Bit 6
01h
0h
0b
Enable path from IN1A
TO MIXOUTL
3
(03h)
R47 (2Eh)
1 bits
Bit 4
01h
0h
0b
Enable path from IN1B
TO MIXOUTR
4
(04h)
R48 (2Fh)
1 bits
Bit 8
00h
0h
0b
Un-mute MIXOUTL
5
(05h)
R49 (30h)
1 bits
Bit 8
00h
0h
0b
Un-mute MIXOUTR
6
(06h)
R28 (1Ch)
1 bits
Bit 8
01h
0h
0b
HPOUT1L_VOL=-12dB
and update
7
(07h)
R29 (1Dh)
1 bits
Bit 8
01h
0h
0b
HPOUT1R_VOL=-12dB
and update
8
(08h)
R1 (01h)
2 bits
Bit 8
03h
0h
0b
Enable HPOUTL/R
9
(0Ah)
R96 (60h)
6 bits
Bit 0
22h
0h
0b
Enable HP DLY
10
(0Bh)
R84 (54h)
6 bits
Bit 0
33h
9h
(32.5ms)
0b
Enable DC Servo and
Start Calibration
11
(0Ch)
R96 (60h)
8 bits
Bit 0
EEh
0h
1b
Enable Headphone
Output



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