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LAN9500AI データシート(PDF) 41 Page - Microchip Technology

部品番号 LAN9500AI
部品情報  LAN950x USB 2.0 to 10/100 Ethernet Controller
PDF  213 Pages
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メーカー  MICROCHIP [Microchip Technology]
ホームページ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9500AI データシート(HTML) 41 Page - Microchip Technology

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 2010 - 2015 Microchip Technology Inc.
DS00001875A-page 41
LAN950x
5.3.2.5.7
Set Configuration
The device supports only one configuration. An occurrence of this command places the device into the Configured state.
Since only one configuration is supported, 01h is the only supported configuration value.
5.3.2.5.8
Set Interface
Only one interface is supported by the device. Therefore, this command is of marginal use. If the command is issued
with an alternative setting of 00h and interface setting of 00h, as shown in Table 5-32, the device responds with an ACK.
Otherwise it responds with a STALL handshake.
5.3.3
USB VENDOR COMMANDS
The device implements several vendor specific commands in order to access CSRs and efficiently gather statistics. The
vendor commands allow direct access to Systems CSRs and MAC CSRs.
5.3.3.1
Register Write Command
The commands allows the Host to write a single register. Burst writes are not supported. All writes are 32-bits.
TABLE 5-31:
FORMAT OF SET CONFIGURATION SETUP STAGE
Offset
Field
Value
0h
bmRequestType
00h
1h
bRequest
09h
2h
wValue
Configuration Value
4h
wIndex
00h
6h
wLength
00h
TABLE 5-32:
FORMAT OF SET INTERFACE SETUP STAGE
Offset
Field
Value
0h
bmRequestType
01h
1h
bRequest
0Bh
2h
wValue
00h
4h
wIndex
00h
6h
wLength
00h
Note:
When in the Normal state, accesses to the MAC CSRs are stalled.
TABLE 5-33:
FORMAT OF REGISTER WRITE SETUP STAGE
Offset
Field
Value
0h
bmRequestType
40h
1h
bRequest
A0h
2h
wValue
00h
4h
wIndex
{0h, CSR Address[11:0]}
6h
wLength
04h
TABLE 5-34:
FORMAT OF REGISTER WRITE DATA STAGE
Offset
Field
0h
Register Write Data [31:0]



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