LAN9500AI datasheet(48/213 Pages) MICROCHIP

48 / 213 page

LAN950x

DS00001875A-page 48

 2010 - 2015 Microchip Technology Inc.

TABLE 5-41:

TX COMMAND A FORMAT

BITS

DESCRIPTION

31:18

RESERVED

17:16

Data Start Offset (bytes)

This field specifies the offset of the first byte of TX Data. The offset value ranges between 0 bytes

and 3 bytes.

15:14

RESERVED

First Segment

When set, this bit indicates that the associated buffer is the first segment of the frame.

Last Segment

When set, this bit indicates that the associated buffer is the last segment of the frame.

RESERVED

10:0

Buffer Size (bytes)

This field indicates the number of bytes contained in the buffer following the two command DWORDS

(TX Command A and TX Command B). This value, along with the Data Start Offset field, is used by

the FCT to determine how many extra bytes were added to the end of the Buffer. A running count is

also maintained in the FCT of the cumulative buffer sizes for a given frame. This cumulative value is

compared against the Frame Length field in the TX Command B word and if they do not correlate,

the TXE flag is set.

The buffer size specified does not include bytes added due to the end of buffer alignment padding or

the Data Start Offset field.

TABLE 5-42:

TX COMMAND B FORMAT

BITS

DESCRIPTION

31:15

RESERVED

TX Checksum Enable (CK)

If this bit is set in conjunction with the first segment bit (FS) in TX Command 'A' and the TX checksum

offload engine enable bit (TXCOE_EN) in the checksum offload engine control register (COE_CR),

the TX checksum offload engine (TXCOE) will calculate an L3 checksum for the associated frame.

Note:

This bit only needs to be set for the first buffer of a frame.

Add CRC Disable

When set, the automatic addition of the CRC is disabled.

Disable Ethernet Frame Padding

When set, this bit prevents the automatic addition of padding to an Ethernet frame of less than 64

bytes. The CRC field is also added despite the state of the Add CRC Disable field.

RESERVED

10:0

Frame Length (bytes)

This field indicates the total number of bytes in the current frame. This length does not include the

offset or padding. If the Frame Length field does not match the actual number of bytes in the frame,

the Transmitter Error (TXE) flag will be set (in the Interrupt Status Register (INT_STS) and the

interrupt endpoint). This value is read by the TX FIFO controller, and is used to determine the amount

of data that must be moved from the TX data FIFO into the TLI block. If the byte count is not aligned

to a DWORD boundary, the TX FIFO Controller will issue the correct byte enables to the TLI layer

during the last write. Invalid bytes in the last DWORD will not be passed to the TLI for transmission.

LAN9500AI データシート(PDF) 48 Page - Microchip Technology

LAN9500AI データシート(HTML) 48 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

データシートダウンロード

リンク URL

LAN9500AI データシート(PDF) 48 Page - Microchip Technology

LAN9500AI データシート(HTML) 48 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

データシート ダウンロード

リンク URL

データシートダウンロード