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LAN9500AI データシート(PDF) 97 Page - Microchip Technology |
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LAN9500AI データシート(HTML) 97 Page - Microchip Technology |
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97 / 213 page  2010 - 2015 Microchip Technology Inc. DS00001875A-page 97 LAN950x • MAC Address High Register (ADDRH) and MAC Address Low Register (ADDRL) • Hardware Configuration Register (HW_CFG) • LED General Purpose IO Configuration Register (LED_GPIO_CFG) • General Purpose IO Wake Enable and Polarity Register (GPIO_WAKE) 5.9 Device Clocking The device requires a fixed-frequency 25MHz clock source. This is typically provided by attaching a 25MHz crystal to the XI and XO pins. The clock can optionally be provided by driving the XI input pin with a single-ended 25MHz clock source. If a single-ended source is selected, the clock input must run continuously for normal device operation. Internally, the device generates its required clocks with a phase-locked loop (PLL). It reduces its power consumption in several of its operating states by disabling its internal PLL and derivative clocks. The 25MHz clock remains operational in all states where power is applied. 5.10 Device Power Sources The device may be soft powered by the USB bus or self powered via external power supplies. The following external 3.3V power supplies are required when power is not being furnished by the USB bus: • VDD33IO, VDD33A 5.11 Power States The following power states are featured. • UNPOWERED • NORMAL (Unconfigured and Configured) • Suspend (SUSPEND0, SUSPEND1, SUSPEND2, and SUSPEND3) All four SUSPEND states are supported by LAN9500A/LAN9500Ai. SUSPEND3 is not supported by LAN9500/LAN9500i. Figure 5-29 illustrates the power states and allowed state transitions. Note: The device also uses power supplied by an internal regulator and connection does not vary. Since the reg- ulated supply is derived from VDD33IO, there is no need to discuss it separately. FIGURE 5-29: POWER STATES UN PO W E R E D NORM A L (C onfig ured ) SU S PEND 0 SUSPEND 1 SUSPEND 2 US B Re su m e || WO L || GP IO U S B S u spend US B Re su m e || GP IO U S B S u spend US B Re su m e || E nergy D e te ct || GP IO US B S u s p en d !VBU S _ D E T (A ny state ) (P O R || n R ES ET || US B Re s e t || S R S T ) && VBU S _ D E T NORM A L (U n c onfig ured ) C onfig ured D e c onfigured US B Re su m e || GP IO U S B S u spend SUSPEND 3 U S B Sus p e nd US B Re s u m e || F ram e R e ce ived || GP IO VB U S _ D ET As se rte d |
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