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LAN9500AI データシート(PDF) 157 Page - Microchip Technology

部品番号 LAN9500AI
部品情報  LAN950x USB 2.0 to 10/100 Ethernet Controller
PDF  213 Pages
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メーカー  MICROCHIP [Microchip Technology]
ホームページ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9500AI データシート(HTML) 157 Page - Microchip Technology

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 2010 - 2015 Microchip Technology Inc.
DS00001875A-page 157
LAN950x
7.3.31
FLAG ATTRIBUTES REGISTER (FLAG_ATTR)
This register is supported only by LAN9500A/LAN9500Ai.
This register sets the values of elements of the Configuration Flags and PME flags when no EEPROM is present and
customized operation, using Descriptor RAM images, is to occur. This register does not contain Configuration Flag ele-
ments that are components of other registers. Those elements will be programmed by the driver software directly prior
to initiating customized operation via Descriptor RAM.
Note 1: This register only affects system operation when an EEPROM is not present and the EEPROM Emulation
Enable (EEM) bit indicates Descriptor RAM and the Attributes Registers are to be used for descriptor pro-
cessing.
2: Writing to this register when an EEPROM is present is prohibited and will result in untoward operation and
unexpected results.
3: This register is protected by Reset Protection (RST_PROTECT).
Note 7-21
The default value depends on the setting of the RMT_WKP strap.
Note 7-22
The default value depends on the setting of the PWR_SEL strap.
Address:
0B0h
Size:
32 bits
Bits
Description
Type
Default
31:18
RESERVED
RO
-
17
Remote Wakeup Support (RMT_WKP)
Refer to Remote Wakeup Support bit in Table 5-58, “Configuration Flags,” on
page 80 for definition.
R/W
Note 7-21
16
Power Method (PWR_SEL)
Refer to Power Method bit in Table 5-58, “Configuration Flags,” on page 80
for definition.
R/W
Note 7-22
15:8
RESERVED
RO
-
7:0
GPIO PME Flags (PME_FLAGS)
Refer to Table 5-59, “GPIO PME Flags,” on page 81 for bit definitions.
R/W
00h



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