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AD9549 データシート(PDF) 69 Page - Analog Devices

部品番号 AD9549
部品情報  Dual Input Network Clock Generator/Synchronizer
PDF  78 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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AD9549 データシート(HTML) 69 Page - Analog Devices

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Preliminary Technical Data
AD9549
Rev. PrA | Page 69 of 78
0106; S Divider (continued)
[0] Divide by 2: Setting this bit enables an additional /2 pre-scalar. See “Feedback Divider (Divide-by-S)” on Page 23. If the
desired feedback ratio is greater than 65536, or if the feedback signal on FDBK_IN is greater than 400 MHz, then this bit must
be set. An example of this case is when the PLL is locking to an image of the DAC output that is above the Nyquist frequency.
[6:1] Unused
[7] Falling Edge Triggered: Setting this bit inverts the reference clock before the S divider.
Digital PLL Loop Filter
0107; P Divider
[4:0] Divide Ratio: Controls the ratio of DAC sample rate to loop filter sample rate. See “Digital Loop Filter” on Page 24.
Loop filter sample rate = DAC Sample rate / 2^(Divide Ratio[4:0]). For the default case of 1 GHz DAC sample rate, and
P Divider [4:0] of 5, the loop filter sample rate is 31.25 MHz. Note: The DAC sample rate is the same as System Clock.
0108 – 0109; Loop Coefficients (See ”Digital Loop Filter Coefficients” on Page 28.)
(Note : The AD9549 evaluation software will derive these values.)
[11:0] Alpha-0: Linear coefficient for “alpha” coefficient
010A; Loop Coefficients (continued)
[4:0] Alpha-1: Power of 2 multiplier for “alpha” coefficient
010B; Loop Coefficients (continued)
[3:0] Alpha-2: Power of 2 divider for “alpha” coefficient
010C – 010D; Loop Coefficients (continued)
[11:0] Beta-0: Linear coefficient for “beta” coefficient
010E; Loop Coefficients (continued)
[2:0] Beta-1: Power of 2 divider for “beta” coefficient
010F – 0110; Loop Coefficients (continued)
[11:0] Gamma-0: Linear coefficient for “gamma” coefficient
0111; Loop Coefficients (continued)
[2:0] Gamma -1: Power of 2 divider for “gamma” coefficient
0112 – 0114; Reserved
0115 – 011A; FTW Estimate (Read-Only)
[47:0] FTW Estimate: This is frequency estimate from frequency estimator circuit, and is informational only. It’s useful for
verifying the input reference frequency. See “Frequency Estimator“ on Page 47 for a description.



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