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AD9549 データシート(PDF) 20 Page - Analog Devices

部品番号 AD9549
部品情報  Dual Input Network Clock Generator/Synchronizer
PDF  78 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9549 データシート(HTML) 20 Page - Analog Devices

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AD9549
Preliminary Technical Data
Rev. PrA | Page 20 of 78
CMOS
registers to the control registers (see the Write subsection of the General Operation of
Serial Control Port section).
61
I
3.3V
CMOS
CSB
Chip Select: Active low. When programming a device, this pin must be held low. In
systems where more than one AD9549 is present this enables individual programming
of each AD9549
62
O
3.3V
CMOS
SDO
Serial Data Output: When the device is in three wire mode, data is read on this pin
63
I/O
3.3V
CMOS
SDIO
Serial Data Input/Output: When the device is in three-wire mode, data is written via this
pin. In 2 wire mode, data reads and writes both occur on this pin
64
O
3.3V
CMOS
SCLK
Serial Programming Clock: data clock for serial programming.



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