PM7366-PI datasheet(4/286 Pages) PMC

4 / 286 page

RELEASED

PM7366 FREEDM-8

DATA SHEET

PMC-1970930

ISSUE 4

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

9.4.5

FREE QUEUE CACHE..................................................................... 48

9.5

PCI CONTROLLER............................................................................................ 49

9.5.1

MASTER MACHINE ......................................................................... 49

9.5.2

MASTER LOCAL BUS INTERFACE................................................. 51

9.5.3

TARGET MACHINE.......................................................................... 52

9.5.4

CBI BUS INTERFACE ...................................................................... 54

9.5.5

ERROR / BUS CONTROL................................................................ 54

9.6

TRANSMIT DMA CONTROLLER ...................................................................... 54

9.6.1

DATA STRUCTURES ....................................................................... 55

9.6.2

TASK PRIORITIES ........................................................................... 66

9.6.3

DMA TRANSACTION CONTROLLER ............................................. 66

9.6.4

READ DATA PIPELINE..................................................................... 66

9.6.5

DESCRIPTOR INFORMATION CACHE........................................... 66

9.6.6

FREE QUEUE CACHE..................................................................... 66

9.7

TRANSMIT HDLC CONTROLLER / PARTIAL PACKET BUFFER .................... 67

9.7.1

TRANSMIT HDLC PROCESSOR..................................................... 67

9.7.2

TRANSMIT PARTIAL PACKET BUFFER PROCESSOR ................. 67

9.8

TRANSMIT CHANNEL ASSIGNER ................................................................... 69

9.8.1

LINE INTERFACE............................................................................. 70

9.8.2

PRIORITY ENCODER...................................................................... 70

9.8.3

CHANNEL ASSIGNER ..................................................................... 71

9.9

PERFORMANCE MONITOR ............................................................................. 71

9.10

JTAG TEST ACCESS PORT INTERFACE ........................................................ 71

9.11

PCI HOST INTERFACE ..................................................................................... 71

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