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LAN9500AI データシート(PDF) 175 Page - Microchip Technology |
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LAN9500AI データシート(HTML) 175 Page - Microchip Technology |
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175 / 213 page  2010 - 2015 Microchip Technology Inc. DS00001875A-page 175 LAN950x 7.5.1 BASIC CONTROL REGISTER Index (In Decimal): 0 Size: 16 bits Bits Description Type Default 15 PHY Soft Reset 1 = PHY software reset. Bit is self-clearing. When setting this bit do not set other bits in this register. Note: The PHY will be in the normal mode after a PHY software reset. SC 0b 14 Loopback 0 = normal operation 1 = loopback mode R/W 0b 13 Speed Select 0 = 10Mbps 1 = 100Mbps Note: Ignored if Auto Negotiation is enabled (0.12 = 1). R/W 1b 12 Auto-Negotiation Enable 0 = disable auto-negotiate process 1 = enable auto-negotiate process (overrides 0.13 and 0.8) R/W 1b 11 Power Down 0 = normal operation 1 = General power down mode Note: The Auto-Negotiation Enable must be cleared before setting the Power Down. R/W 0b 10 RESERVED RO - 9 Restart Auto-Negotiate 0 = normal operation 1 = restart auto-negotiate process Note: Bit is self-clearing. SC 0b 8 Duplex Mode 0 = half duplex 1 = full duplex Note: Ignored if Auto Negotiation is enabled (0.12 = 1). R/W 0b 7 Collision Test 0 = disable COL test 1 = enable COL test R/W 0b 6:0 RESERVED RO - |
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