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AD9882/PCB データシート(PDF) 5 Page - Analog Devices

部品番号 AD9882/PCB
部品情報  Dual Interface for Flat Panel Displays
PDF  36 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9882/PCB データシート(HTML) 5 Page - Analog Devices

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REV. A
AD9882
–5–
Test
AD9882KST
Parameter
Conditions
Temp
Level
Min
Typ
Max
Unit
AC SPECIFICATIONS
Intra-Pair (+ to –) Differential
Input Skew (TDPS)
Full
IV
360
ps
Channel-to-Channel Differential
Full
IV
1
Clock
Input Skew (TCCS)
Period
Low-to-High Transition Time
for Data (DLHT)Output Drive = High,
CL = 10 pF
Full
IV
2.2
ns
Output Drive = Med,
CL = 7 pF
Full
IV
2.5
ns
Output Drive = Low,
CL = 5 pF
Full
IV
3.2
ns
Low-to-High Transition Time for
DATACK (DLHT)Output Drive = High,
CL = 10 pF
Full
IV
1.0
ns
Output Drive = Med,
CL = 7 pF
Full
IV
1.6
ns
Output Drive = Low,
CL = 5 pF
Full
IV
2.1
ns
High-to-Low Transition Time for
Data (DHLT)Output Drive = High,
CL = 10 pF
Full
IV
2.2
ns
Output Drive = Med,
CL = 7 pF
Full
IV
1.9
ns
Output Drive = Low,
CL = 5 pF
Full
IV
1.7
ns
High-to-Low Transition Time for
DATACK (DHLT)Output Drive = High,
CL = 10 pF
Full
IV
1.0
ns
Output Drive = Med,
CL = 7 pF
Full
IV
1.0
ns
Output Drive = Low,
CL = 5 pF
Full
IV
1.4
ns
Data-to-Clock Skew
4
Full
IV
–0.5
+2.0
ns
Duty Cycle, DATACK
4
Full
IV
40
46
50
%
DATACK Frequency (FCIP)
Full
VI
25
112
MHz
NOTES
1The typical pattern contains a grayscale area, Output Drive = High.
2DATACK Load = 10 pF, Data Load = 10 pF.
3The worst-case pattern contains a black and white checkerboard pattern, Output Drive = High.
4DRIVE STRENGTH = 11
Specifications subject to change without notice.



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