STM32L100C6 datasheet(26/103 Pages) STMICROELECTRONICS

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Functional overview

STM32L100C6 STM32L100R8/RB

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DocID024295 Rev 5

3.14.1

General-purpose timers (TIM2, TIM3, TIM4, TIM9, TIM10 and TIM11)

There are six synchronizable general-purpose timers embedded in the STM32L100C6 and

STM32L100R8/RB devices (see Table 5 for differences).

TIM2, TIM3, TIM4

These timers are based on a 16-bit auto-reload up/down-counter and a 16-bit prescaler.

They feature 4 independent channels each for input capture/output compare, PWM or one-

pulse mode output. This gives up to 12 input captures/output compares/PWMs on the

largest packages.

The TIM2, TIM3, TIM4 general-purpose timers can work together or with the TIM10, TIM11

and TIM9 general-purpose timers via the Timer Link feature for synchronization or event

chaining. Their counter can be frozen in debug mode. Any of the general-purpose timers

can be used to generate PWM outputs.

TIM2, TIM3, TIM4 all have independent DMA request generation.

These timers are capable of handling quadrature (incremental) encoder signals and the

digital outputs from 1 to 3 hall-effect sensors.

TIM10, TIM11 and TIM9

TIM10 and TIM11 are based on a 16-bit auto-reload upcounter. TIM9 is based on a 16-bit

auto-reload up/down counter. They include a 16-bit prescaler. TIM10 and TIM11 feature one

independent channel, whereas TIM9 has two independent channels for input capture/output

compare, PWM or one-pulse mode output. They can be synchronized with the TIM2, TIM3,

TIM4 full-featured general-purpose timers.

They can also be used as simple time bases and be clocked by the LSE clock source

(32.768 kHz) to provide time bases independent from the main CPU clock.

3.14.2

Basic timers (TIM6 and TIM7)

These timers are mainly used for DAC trigger generation. They can also be used as generic

16-bit time bases.

3.14.3

SysTick timer

This timer is dedicated to the OS, but could also be used as a standard downcounter. It is

based on a 24-bit down-counter with autoreload capability and a programmable clock

source. It features a maskable system interrupt generation when the counter reaches 0.

3.14.4

Independent watchdog (IWDG)

The independent watchdog is based on a 12-bit down-counter and 8-bit prescaler. It is

clocked from an independent 37 kHz internal RC and, as it operates independently of the

main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog

to reset the device when a problem occurs, or as a free-running timer for application timeout

management. It is hardware- or software-configurable through the option bytes. The counter

can be frozen in debug mode.

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