GD25LB64CSIS datasheet(69/70 Pages) GIGADEVICE

69 / 70 page

1.8V Uniform Sector

Dual and Quad Serial Flash

GD25LB64C

11. REVISION HISTORY

Version No

Description

Page

Date

1.0

Initial Release

---

2014-6-17

1.1

Modify Package WSON 8 (6*5mm)

---

2015-6-16

1.2

Modify Package VSOP8 208MIL

---

2015-7-14

1.3

Modify AC CHARACTERISTICS

Modify POWER-ON TIMING

---

2015-11-9

1.4

Modify POWER-ON TIMING

---

2016-1-6

1.5

Add

“Page” column to the Revision History

Modify tw max. value from 35ms to 45ms

Modify Input Pause Voltage from “0.2VCC to 0.8VCC” to “0.1VCC

to 0.8VCC”

Modify Input Timing Reference Voltage from “0.3VCC to 0.7VCC”

to “0.2VCC to 0.7VCC”

Modify Icc4-Icc7 max value from 10mA to 20mA

Add Icc8 in DC CHARACTERISTICS, of which the max. value is

20mA

Modify VIL from 0.3VCC to 0.2VCC

Delete tRST_R and tRST_P

Add tRST, of which the max. value is 30us

Modify Icc2 max value from 5uA to 8uA

P67

P60

P58

P59

P60

P59

2017-11-13

1.6

Modify tVSL min value from 5ms to 1.8ms

Modify fc1 from 133MHz to 120MHz

Add fc2, of which the max value is 104HMz

Add tRS, of which the min value is 100us

Update the description of all packages

P57

P60

P64-66

2018-4-12

1.7

Add 4BH command

Modify the sequence diagram of 42H command

P46

P48

2018-9-4

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