VNF1048F datasheet(18/52 Pages) STMICROELECTRONICS

部品番号	VNF1048F

部品情報	High-side switch Controller with intelligent fuse protection for 12 V, 24 V and 48 V automotive applications

PDF	52 Pages

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メーカー	STMICROELECTRONICS [STMicroelectronics]

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Figure 6. Current sense self test flow sequence

4.2

External FET VDS Detection Self Test

The goal of the external FET VDS Detection Self Test is to verify the proper behavior of the complete VDS monitor

chain (sense/process/detection), from the analog input to the digital output.

Starting from the Unlocked State, the VDS Detection Self Test is activated through a dedicated SPI frame. The

duration of this test is around 10 μs; the first 5 μs are intended to convert the value of the voltage across

Drain and Source terminals of external FET, remaining 5 µs are required to bring back analog circuitry to normal

configuration.

Once the Self Test is started, an internal current generator provides a current sink able to produce an additional

voltage offset of 100 mV on VDS monitor circuit inputs, to distinguish Self Test execution from normal operation. In

order to guarantee proper data conversions, special care must be taken to avoid VDS ADC saturation by keeping

the overall VDS sensed by monitor circuit below maximum scale range (1.87 V).

VNF1048F

External FET VDS Detection Self Test

DS13084 - Rev 6

page 18/52

VNF1048F データシート(PDF) 18 Page - STMicroelectronics