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VNF1048F データシート(PDF) 36 Page - STMicroelectronics

部品番号 VNF1048F
部品情報  High-side switch Controller with intelligent fuse protection for 12 V, 24 V and 48 V automotive applications
PDF  52 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VNF1048F データシート(HTML) 36 Page - STMicroelectronics

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Bit
Default
Name
Description
Access
9
0
VDS_MAX
External MOSFET desaturation shut-down: a desaturation shut-down of the
MOSFET (VDS_MAX = 1) and the bypass switch occurs if the VDS exceeds
the preset threshold when HS is in on-state after VDS_DEGLITCH time.
The MOSFET and the bypass switch are re-armed via SPI.
R/C
8
0
BYPASS_SAT
Low Current Bypass desaturation shut-down: a desaturation shut-down of the
Low Current Bypass (BYPASS_SAT = 1) occurs if the VDS exceeds the fixed
threshold when HS is in off-state and bypass is in on-state.
When BYPASS_SAT = 1, External MOSFET is automatically commanded on,
independently on OUTCTL bit value.
The Low Current Bypass is re-armed via SPI. A transition to WakeUp mode
causes this bit to be set to 1.
R/C
7
0
FUSE_LATCH
Current vs Time latch-off: an overcurrent shut-down of the MOSFET
(FUSE_LATCH = 1) and the bypass switch occurs when the current sense
voltage exceeds the preset threshold for longer than the preset time (I2-t
curve emulating a traditional fuse).
The MOSFET and bypass switch are re-armed via SPI.
R/C
6
0
OVC
Overcurrent warning: an overcurrent warning (OVC = 1) occurs even when
average current sense value evaluated in a time interval equal to tI_SAMPLING
(time basis used by fuse emulation algorithm) exceeds current threshold
programmed through OVC_THR.
This is a “real-time” bit
OVC bit keeps memory of the previous events: once this bit is set, it will be
reset automatically after a time depending on current level previously reached
and on the related timings.
Moreover, after a FUSE_LATCH bit setting, OVC will be automatically reset
in a time interval proportional to the TNOM value previously programmed
(provided that in the meantime FUSE_LATCH is not cleared, high side
restarts and current is again above OVC_THR).
Resetting FUSE_LATCH bit when OVC bit is still set to 1 is possible, but in
this case user can expect that trip time will be lower than expected.
R
5
0
DEV_OVT
Over-temperature shut-down (“real-time” bit). When DEV_OVT = 1, the
MOSFET, the charge pump and the bypass switch are turned off.
R
4
0
NTC_OVT
External MOS Over-Temperature: this bit is latched when NTC is lower than
NTC_THR. When NTC_OVT = 1 both External MOS and bypass switch are
turned off. The MOSFET and the bypass switch are re-armed via SPI.
R/C
3
0
VGS_LOW
This bit will be set in on-state when VGS falls below UV threshold
(VGS_UVLO_10V) for more than VG_UVLO_DEGLITCH. When this bit is set,
external FET is switched off.
R/C
2
0
CP_LOW
This bit will be set when VCP falls below VCP_LOW threshold for more than
tCP_RISE. When this bit is set, external FET driver is disabled. This is a “real-
time” bit.
R
1
0
WD_FAIL
Watchdog failure bit:
0: Watchdog OK;
1: Watchdog failure in Unlocked / Selftest states
When this bit is set, device goes to Locked state. To go back to the unlocked
mode through the GoToUnlocked sequence this bit must be cleared.
R/C
0
0
Parity Bit
Odd Parity Bit Check
VNF1048F
Status registers
DS13084 - Rev 6
page 36/52



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