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UPD17708 データシート(PDF) 158 Page - Renesas Technology Corp

部品番号 UPD17708
部品情報  MOS INTEGRATED CIRCUIT
PDF  358 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD17708 データシート(HTML) 158 Page - Renesas Technology Corp

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µPD17704, 17705, 17707, 17708, 17709
156
Therefore, as shown in Figure 13-7, the error of the time until the BTM0CY flag is first set after the
BTM0CY flag setting time has been changed is as follows:
–tSET < Error < tCHECK
tSET
: new setting time of BTM0CY flag
tCHECK : time to detect BTM0CY flag
Phase differences are provided among the internal pules of 10, 20, 50, and 100 Hz. Because these phase
differences are shorter than the newly set pulse time, they are included in the above error.
Figure 13-7. Timer Error When BTM0CY Flag Setting Time Is Changed from A to B
H
L
H
L
H
L
H
L
tSET
SKT1 BTM0CY
Intrinsic timer time
Actual timer time
Time changed
Internal pulse A
Internal pulse B
BTM0CY flag
setting pulse
BTM0CY flag
tSET
tCHECK
Actual timer time
Intrinsic timer time
Time changed
An error of tCHECK occurs if the timer time is
changed immediately after BTM0CY flag
has been detected because the flag is then
reset once.
An error of -tSET occurs if BTM0CY flag is
detected immediately after the timer time
has been changed because the flag then
becomes “1”.



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