MCP3919B datasheet(3/81 Pages) MICROCHIP

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DS20006995A-page 3

MCP3919B

1.0

ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings†

DD ..................................................................... -0.3V to 4.0V

Digital inputs and outputs w.r.t. AGND................. -0.3V to 4.0V

Analog input w.r.t. AGND ..................................... ....-2V to +2V

VREF input w.r.t. AGND .............................. -0.6V to VDD + 0.6V

Storage temperature .....................................-65°C to +150°C

Ambient temp. with power applied ................-65°C to +125°C

Soldering temperature of leads (10 seconds) ............. +300°C

ESD on all pins (HBM,MM) ....................................4 kV, 300V

† Notice: Stresses above those listed under “Absolute

Maximum Ratings” may cause permanentdamage to the

device.Thisisastressratingonlyandfunctionaloperation

ofthedeviceatthoseoranyotherconditions,abovethose

indicated in the operational listings of this specification,

is not implied. Exposure to maximum rating conditions

for extended periods may affect device reliability.

1.1

Electrical Specifications

TABLE 1-1:

ANALOG SPECIFICATIONS

Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 3V; MCLK = 4 MHz;

PRE[1:0] = 00; OSR = 256; GAIN = 1; VREFEXT = 0; CLKEXT = 1; DITHER[1:0] = 11; BOOST[1:0] = 10; VCM =0V;

TA = -40°C to +125°C; VIN = -0.5 dBFS @ 50/60 Hz on all channels.

Characteristic

Sym.

Min.

Typ.

Max.

Units

Conditions

ADC Performance

Resolution

(no missing codes)

—

bits

OSR = 256 or greater

Sampling Frequency

fS(DMCLK)

—

MHz

For maximum condition,

BOOST[1:0] = 11

Output Data Rate

fD(DRCLK)

—

125

ksps

For maximum condition,

BOOST[1:0] = 11, OSR = 32

Analog Input Absolute

Voltage on CHn+/- Pins,

n between 0 and 2

CHn+/-

-1

—

All analog input channels

measured to AGND

Analog Input

Leakage Current

IIN

—

±1

—

RESET[2:0] = 111,

MCLK running continuously

Differential Input

Voltage Range

(CHn+–CHn-) -600/GAIN

—

+600/GAIN

VREF = 1.2V, proportional to VREF

Offset Error

VOS

-2

0.2

Note 5

Offset Error Drift

—

0.5

—

µV/°C

Gain Error

-6

—

Note 5

Gain Error Drift

—

ppm/°C

Note 1: Dynamic performance specified at -0.5 dB below the maximum differential input value,

VIN =1.2 VPP =424 mVRMS @ 50/60 Hz, VREF =1.2V. See Section 4.0 “Terminology and Formulas”

for definition. This parameter is established by characterization and not 100% tested.

2: For these operating currents, the following Configuration bit settings apply: SHUTDOWN[2:0] = 000,

RESET[2:0] = 000, VREFEXT = 0, CLKEXT = 0.

3: For these operating currents, the following Configuration bit settings apply: SHUTDOWN[2:0] = 111,

VREFEXT = 1, CLKEXT = 1.

4: Measured on one channel versus all others channels. The specification is the average of crosstalk

performance over all channels (see Figure 2-32 for individual channel performance).

5: Applies to all gains. Offset and gain errors depend on the PGA gain setting; see Section 2.0 “Typical

Performance Curves” for typical performance.

6: Outside of this range, ADC accuracy is not specified. An extended input range of ±2V can be applied

continuously to the part with no damage.

7: For proper operation and for optimizing ADC accuracy, limiting AMCLK to the maximum frequency defined in

Table 5-2, as a function of the BOOST and PGA settings chosen is recommended. MCLK can take larger values

as long as the prescaler settings (PRE[1:0]) limit AMCLK = MCLK/PRESCALE in the defined range in Table 5-2.

8: This parameter is established by characterization and not 100% tested.

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