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ADRF6655ACPZ-R7 データシート(PDF) 4 Page - Analog Devices |
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ADRF6655ACPZ-R7 データシート(HTML) 4 Page - Analog Devices |
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4 / 44 page  ADRF6655 Rev. 0 | Page 4 of 44 Parameter Test Conditions/Comments Min Typ Max Unit SYNTHESIZER SPECIFICATIONS Synthesizer specifications referenced to 1 × LO4 Fundamental VCO Sensitivity VCO tuning sensitivity before divide-by-2 or divide-by-3 75 MHz/V Spurs Measured at LO output Reference/PFD Spurs fPFD/2 −95 dBc fPFD −83 dBc 2 × fPFD −85 dBc 4 × fPFD −88 dBc Phase Noise PFD frequency = 20 MHz4 LO Frequency = 1330 MHz @ 10 kHz offset −85 dBc/Hz @ 100 kHz offset −114 dBc/Hz @ 1 MHz offset −138 dBc/Hz @ 10 MHz offset −154 dBc/Hz Integrated Phase Noise 10 kHz to 40 MHz integration bandwidth 0.3 °rms LO Frequency = 1840 MHz @ 10 kHz offset −83 dBc/Hz @ 100 kHz offset −111 dBc/Hz @ 1 MHz offset −136 dBc/Hz @ 10 MHz offset −152 dBc/Hz Integrated Phase Noise 10 kHz to 40 MHz integration bandwidth 0.4 °rms PFD Frequency 19.33 20 40 MHz REFERENCE CHARACTERISTICS REFIN, MUXOUT REFIN Input Frequency 10 20 160 MHz REFIN Input Capacitance 4 pF REFIN Input Current ±100 μA REFIN Input Sensitivity AC-coupled 0.25 1 3.3 V p-p MUXOUT Output Levels VOL (lock detect output selected) 0.25 V VOH (lock detect output selected) 2.7 V CHARGE PUMP CP Pump Current Charge pump current adjustable using Register 4 and/or RSET (see Pin 5 description) 500 μA Output Compliance Range 1 2.8 V LOGIC INPUTS CLK, DATA, LE VINH, Input High Voltage 1.4 3.3 V VINL, Input Low Voltage 0 0.7 V IINH/IINL, Input Current ±1 μA CIN, Input Capacitance 3 pF POWER SUPPLIES VCC1, VCC2, VCCLO Voltage Range 4.75 5 5.25 V Supply Current LO output buffer disabled PLL only 115 mA Normal TX mode, IP3SET = 3.2 V, fLO ≤1530 MHz (divide-by-3) 310 mA Normal TX mode, IP3SET = 3.2 V, fLO > 1530 MHz (divide-by-2) 270 mA Normal RX mode, IP3SET = open, fLO ≤ 1530 MHz (divide-by-3) 285 mA Normal RX mode, IP3SET = open, fLO > 1530 MHz (divide-by-2) 245 mA Power-down mode 15 mA 1 Internal LO path divider programmed via serial interface. See the section for additional information. LO Signal Chain 2 See the section. External LO Interface 3 Improved return loss can be achieved using external matching. See the section for more details. Circuit Description 4 Measured on standard evaluation board with 1.5 kHz loop filter (C13 = 47 nF, C14 = 0.1 μF, C15 = 4.7 μF, R9 = 270 Ω, R10 = 68 Ω). |
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