ADRF6655ACPZ-R7 datasheet(39/44 Pages) AD

部品番号	ADRF6655ACPZ-R7

部品情報	Broadband Up/Downconverting Mixer with Integrated Fractional-N PLL and VCO

PDF	44 Pages

Scroll/Zoom	100%

メーカー	AD [Analog Devices]

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39 / 44 page

ADRF6655

Rev. 0 | Page 39 of 44

The package for the ADRF6655 features an exposed paddle

on the underside that should be well soldered to a low thermal

and electrical impedance ground plane. This paddle is typically

soldered to an exposed opening in the solder mask on the

evaluation board. Figure 83 illustrates the dimensions used

in the layout of the ADRF6655 footprint on the ADRF6655

evaluation board (1 mil. = 0.0254 mm).

Notice the use of nine via holes on the exposed paddle. These

ground vias should be connected to all other ground layers on the

evaluation board to maximize heat dissipation from the device

package. Under these conditions, the thermal impedance of the

ADRF6655 was measured to be approximately 29°C/W in still air.

.168

.232

.177

.035

.050

.012

.025

.020

Figure 83. Evaluation Board Layout Dimensions for the ADRF6655 Package

Figure 84. Evaluation Board Top Layer

Figure 85. Evaluation Board Bottom Layer

ADRF6655ACPZ-R7 データシート(PDF) 39 Page - Analog Devices