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LAN9500AI データシート(PDF) 204 Page - Microchip Technology |
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LAN9500AI データシート(HTML) 204 Page - Microchip Technology |
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204 / 213 page  LAN950x DS00001875A-page 204 2010 - 2015 Microchip Technology Inc. 8.6 Clock Circuit The device can accept either a 25MHz crystal (preferred) or a 25MHz single-ended clock oscillator (+/- 50ppm) input. If the single-ended clock oscillator method is implemented, XO should be left unconnected and XI should be driven with a nominal 0-3.3V clock signal. The input clock duty cycle is 40% minimum, 50% typical and 60% maximum. It is recommended that a crystal utilizing matching parallel load capacitors be used for the crystal input/output signals (XI/XO). For the LAN9500A/LAN9500Ai, either a 300uW or 100uW 25MHz crystal may be utilized. For the LAN9500/LAN9500i, only a 300uW 25MHz crystal may be utilized. The 300uW 25MHz crystal specifications are detailed in Section 8.6.1, "300uW 25MHz Crystal Specifications," on page 204. The 100uW 25MHz crystal specifications are detailed in Section 8.6.2, "100uW 25MHz Crystal Specifications (LAN9500A/LAN9500Ai Only)," on page 205. 8.6.1 300UW 25MHZ CRYSTAL SPECIFICATIONS When utilizing a 300uW 25MHz crystal, the following circuit design (Figure 8-10) and specifications (Table 8-23) are required to ensure proper operation. Note 8-18 The maximum allowable values for Frequency Tolerance and Frequency Stability are application dependent. Since any particular application must meet the IEEE +/-50 PPM Total PPM Budget, the combination of these two values must be approximately +/-45 PPM (allowing for aging). FIGURE 8-10: 300UW 25MHZ CRYSTAL CIRCUIT TABLE 8-23: 300UW CRYSTAL SPECIFICATIONS Parameter Symbol MIN NOM MAX Units Notes Crystal Cut AT, typ Crystal Oscillation Mode Fundamental Mode Crystal Calibration Mode Parallel Resonant Mode Frequency Ffund - 25.000 - MHz Frequency Tolerance @ 25oCFtol - - +/-50 PPM Note 8-18 Frequency Stability Over Temp Ftemp - - +/-50 PPM Note 8-18 Frequency Deviation Over Time Fage - +/-3 to 5 - PPM Note 8-19 Total Allowable PPM Budget - - +/-50 PPM Note 8-20 Shunt Capacitance CO -7 typ- pF Load Capacitance CL - 20 typ - pF Drive Level PW 300 - - uW Equivalent Series Resistance R1 -- 50 Ohm Operating Temperature Range Note 8-21 - Note 8-22 oC XI Pin Capacitance - 3 typ - pF Note 8-23 XO Pin Capacitance - 3 typ - pF Note 8-23 LAN950x 56-PIN QFN XO XI Y1 C1 C2 |
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