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LAN9500AI データシート(PDF) 205 Page - Microchip Technology |
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LAN9500AI データシート(HTML) 205 Page - Microchip Technology |
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205 / 213 page  2010 - 2015 Microchip Technology Inc. DS00001875A-page 205 LAN950x Note 8-19 Frequency Deviation Over Time is also referred to as Aging. Note 8-20 The total deviation for the Transmitter Clock Frequency is specified by IEEE 802.3u as +/- 50 PPM. Note 8-21 0oC for commercial version, -40oC for industrial version. Note 8-22 +70oC for commercial version, +85oC for industrial version. Note 8-23 This number includes the pad, the bond wire and the lead frame. PCB capacitance is not included in this value. The XO/XI pin and PCB capacitance values are required to accurately calculate the value of the two external load capacitors. These two external load capacitors determine the accuracy of the 25.000 MHz frequency. 8.6.2 100UW 25MHZ CRYSTAL SPECIFICATIONS (LAN9500A/LAN9500AI ONLY) When utilizing a 100uW 25MHz crystal (LAN9500A/LAN9500Ai only), the following circuit design (Figure 8-11) and specifications (Table 8-24) are required to ensure proper operation. FIGURE 8-11: 100UW 25MHZ CRYSTAL CIRCUIT TABLE 8-24: 100UW CRYSTAL SPECIFICATIONS Parameter Symbol MIN NOM MAX Units Notes Crystal Cut AT, typ Crystal Oscillation Mode Fundamental Mode Crystal Calibration Mode Parallel Resonant Mode Frequency Ffund - 25.000 - MHz Frequency Tolerance @ 25oCFtol - - +/-50 PPM Note 8-24 Frequency Stability Over Temp Ftemp - - +/-50 PPM Note 8-24 Frequency Deviation Over Time Fage - +/-3 to 5 - PPM Note 8-25 Total Allowable PPM Budget - - +/-50 PPM Note 8-26 Shunt Capacitance CO -- 5 pF Load Capacitance CL 8 - 12 pF Drive Level PW - 100 - uW Note 8-27 Equivalent Series Resistance R1 -- 80 Ohm XO Series Resistor Rs 495 500 505 Ohm Operating Temperature Range Note 8-28 - Note 8-29 oC LAN950x 56-PIN QFN XO XI RS Y1 C1 C2 |
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