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LAN9500AI データシート(PDF) 206 Page - Microchip Technology |
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LAN9500AI データシート(HTML) 206 Page - Microchip Technology |
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206 / 213 page ![]() LAN950x DS00001875A-page 206 2010 - 2015 Microchip Technology Inc. Note 8-24 The maximum allowable values for Frequency Tolerance and Frequency Stability are application dependent. Since any particular application must meet the IEEE +/-50 PPM Total PPM Budget, the combination of these two values must be approximately +/-45 PPM (allowing for aging). Note 8-25 Frequency Deviation Over Time is also referred to as Aging. Note 8-26 The total deviation for the Transmitter Clock Frequency is specified by IEEE 802.3u as +/- 50 PPM. Note 8-27 The crystal must support 100uW operation to utilize this circuit. Note 8-28 0oC for commercial version, -40oC for industrial version. Note 8-29 +70oC for commercial version, +85oC for industrial version. Note 8-30 This number includes the pad, the bond wire and the lead frame. PCB capacitance is not included in this value. The XO/XI pin and PCB capacitance values are required to accurately calculate the value of the two external load capacitors (C1 and C2 in Figure 8-11). The external load capacitors, C1 and C2, determine the accuracy of the 25.000 MHz frequency. XI Pin Capacitance - 3 typ - pF Note 8-30 XO Pin Capacitance - 3 typ - pF Note 8-30 TABLE 8-24: 100UW CRYSTAL SPECIFICATIONS (CONTINUED) Parameter Symbol MIN NOM MAX Units Notes |
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