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UPD17708 データシート(PDF) 102 Page - Renesas Technology Corp

部品番号 UPD17708
部品情報  MOS INTEGRATED CIRCUIT
PDF  358 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD17708 データシート(HTML) 102 Page - Renesas Technology Corp

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µPD17704, 17705, 17707, 17708, 17709
100
(2) P0A (P0A3, P0A2)
Note
This is an internal signal that is output when the clock stop instruction is executed, and this circuit
is designed not to increase the current consumption due to noise even if it is floated.
11.2.2 Using I/O port
The input or output mode of the I/O ports is set by I/O selection register P0A, P0B, P0C, P1D, P2A, P2B,
P2C, P2D, P3A, P3B, P3C, or P3D of the control registers.
Because P0A, P0B, P0C, P1D, P2A, P2B, P2C, and P2D are bit I/O ports, they can be set in the input or output
mode in 1-bit units.
P3A, P3B, P3C, and P3D are group I/O ports, and therefore they are set in the input or output mode in 4-
bit units.
Setting the output data of or reading the input data of a port is carried out by executing an instruction that
writes data to or reads data from the port.
11.2.3 shows the configuration of the I/O selection register of each port.
11.2.4 and 11.2.5 describe how each port is used as an input or output port.
11.2.6 describes the points to be noted when using the I/O ports.
VDD
I/O selection flag
Output latch
Read instruction
Port register
(1 bit)
Write instruction
CKSTOP Note



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