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FALXT972MCCA4 データシート(PDF) 79 Page - Intel Corporation |
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FALXT972MCCA4 データシート(HTML) 79 Page - Intel Corporation |
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79 / 92 page ![]() Intel ® LXT972M Single-Port 10/100 Mbps PHY Transceiver Datasheet 79 Document Number: 302875-005 Revision Date: 27-Oct-2005 Table 45 lists auto-negotiation advertisement bits. Table 45. Auto-Negotiation Advertisement Register - Address 4, Hex 4 Bit Name Description Type 1 Default 4.15 Next Page 0 = Port has no ability to send multiple pages. 1 = Port has ability to send multiple pages. R/W 0 4.14 Reserved Ignore when read. RO 0 4.13 Remote Fault 0 = No remote fault. 1 = Remote fault. R/W 0 4.12 Reserved Write as ‘0’. Ignore on Read. R/W 0 4.11 Asymmetric Pause Pause operation defined in IEEE 802.3 Standard, Clause 40 and 27 R/W 0 4.10 Pause 0 = Pause operation disabled. 1 = Pause operation enabled for full-duplex links R/W 0 4.9 100BASE-T4 0 = 100BASE-T4 capability is not available. 1 = 100BASE-T4 capability is available. NOTE: The LXT972M Transceiver does not support 100BASE-T4 but allows this bit to be set to advertise in the auto-negotiation sequence for 100BASE-T4 operation. An external 100BASE-T4 transceiver can be switched in if this capability is desired. R/W 0 4.8 100BASE-TX full-duplex 0 = Port is not 100BASE-TX full-duplex capable. 1 = Port is 100BASE-TX full-duplex capable. R/W Note 2 4.7 100BASE-TX 0 = Port is not 100BASE-TX capable. 1 = Port is 100BASE-TX capable. R/W Note 2 4.6 10BASE-T full-duplex 0 = Port is not 10BASE-T full-duplex capable. 1 = Port is 10BASE-T full-duplex capable. R/W Note 2 4.5 10BASE-T 0 = Port is not 10BASE-T capable. 1 = Port is 10BASE-T capable. R/W Note 2 4.4:0 Selector Field, S<4:0> <00001> = IEEE 802.3. <00010> = IEEE 802.9 ISLAN-16T. <00000> = Reserved for future auto-negotiation development. <11111> = Reserved for future auto-negotiation development. NOTE: Unspecified or reserved combinations must not be transmitted. R/W 00001 1. R/W = Read/Write RO = Read Only 2. Some bits have their default values determined at reset by hardware configuration pins. For default details for these bits, see Section 5.4.4, “Hardware Configuration Settings”. |
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