FALXT972MCCA4 datasheet(34/92 Pages) INTEL

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Intel

® LXT972M Single-Port 10/100 Mbps PHY Transceiver

Datasheet

Document Number: 302875-005

Revision Date: 27-Oct-2005

5.5

Establishing Link

Figure 6 shows an overview of link establishment for the LXT972M Transceiver.

Note:

When a link is established by parallel detection, the LXT972M Transceiver sets the duplex mode to

half-duplex, as defined by the IEEE 802.3 standard.

5.5.1

Auto-Negotiation

If not configured for forced operation, the LXT972M Transceiver attempts to auto-negotiate with

its link partner by sending Fast Link Pulse (FLP) bursts. Each burst consists of up to 33 link pulses

spaced 62.5

μs apart. Odd link pulses (clock pulses) are always present. Even link pulses (data

pulses) may be absent or present to indicate a ‘0’ or a ‘1’. Each FLP burst exchanges 16 bits of

data, which are referred to as a “link code word”. All devices that support auto-negotiation must

implement the “Base Page” defined by the IEEE 802.3 standard (Registers 4 and 5).

The LXT972M Transceiver also supports the optional “Next Page” function as listed in Table 48,

“Auto-Negotiation Next Page Transmit Register - Address 7, Hex 7” on page 82 and Table 49,

“Auto-Negotiation Link Partner Next Page Receive Register - Address 8, Hex 8” on page 82.

5.5.1.1

Base Page Exchange

By exchanging Base Pages, the LXT972M Transceiver and its link partner communicate their

capabilities to each other. Both sides must receive at least three consecutive identical base pages for

negotiation to continue. Each side identifies the highest common capabilities that both sides

support, and each side configures itself accordingly.

Figure 6. Link Establishment Overview)

Check Value

0.12

Start

Done

Enable

Auto-Neg/Parallel Detection

Go To Forced

Settings

Attempt Auto-

Negotiation

Listen for 10T

Link Pulses

Listen for 100TX

Idle Symbols

Link Up?

YES

Power-Up, Reset,

or Link Failure

Disable

Auto-Negotiation

0.12 = 0

0.12 = 1

B3496-01

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