FALXT972MCCA4 datasheet(45/92 Pages) INTEL

部品番号	FALXT972MCCA4

部品情報	Single-Port 10/100 Mbps PHY Transceiver

PDF	92 Pages

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メーカー	INTEL [Intel Corporation]

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Intel

® LXT972M Single-Port 10/100 Mbps PHY Transceiver

Datasheet

Document Number: 302875-005

Revision Date: 27-Oct-2005

5.7.3

100BASE-X Protocol Sublayer Operations

With respect to the 7-layer communications model, the LXT972M Transceiver is a Physical Layer

1 (PHY) device.

The LXT972M Transceiver implements the following sublayers of the reference model defined by

the IEEE 802.3 standard, and discussed from the reference model point of view:

• Section 5.7.3.1, “Physical Coding Sublayer”

• Section 5.7.3.2, “Physical Medium Attachment Sublayer”

• Section 5.7.3.3, “Twisted-Pair Physical Medium Dependent Sublayer”

Figure 17 shows the LXT972M Transceiver protocol sublayers.

Figure 17. Intel® LXT972M Protocol Sublayers

Encoder/Decoder

Serializer/De-serializer

Link/Carrier Detect

PCS

Sublayer

PMA

Sublayer

MII Interface

Intel® LXT972M

Transceiver

100BASE-TX

Scrambler/

De-scrambler

PMD

Sublayer

B3514-01

FALXT972MCCA4 データシート(PDF) 45 Page - Intel Corporation