L9908_V01 datasheet(68/152 Pages) STMICROELECTRONICS

68 / 152 page

In addition to STP, an interlocking protection function on INHn and INLn is implemented: when the main logic

processes a rising edge event on INHn/INLn a masking on the opposite signal (INLn/INHn respectively) is applied

for the entire duration of the INHn/INLn on pulse. During this interval any rising edge on the opposite signal is

ignored. In case INHn/INLn rising edge is synchronous then INLn has the priority.

The interlocking protection is always active and cannot be disabled.

Figure 41. Interlocking protection on PWM inputs: functional operation

Figure 42. Shoot-Through diagnosis on PWM inputs: functional operation

Note:

PWM STD Filter integrates INHn/INLn timing overlap on multiple PWM periods, in this way STD Fault on PWM

inputs can be detected also in case minimum timing overlaps are spread over multiple and not adjacent periods.

The second diagnosis level consists in a dedicated digital counter for each half bridge (HS/LS couple) set/reset by

the logic NOR of the HS/LS VGS comparators and integrates the time interval where the HS and the LS are on

together.

If HSn_OFF=LSn_OFF=’0’ occurs for an interval longer than T_stp_vgs_flt the flag STP_VGS_n is set. The error

flag remains set until the failure condition is removed and the flag is cleared by the SPI command.

L9908

Functional description

DS13546 - Rev 5

page 68/152

L9908 データシート(PDF) 68 Page - STMicroelectronics