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ADXL346ACCZ-R2 データシート(PDF) 34 Page - Analog Devices |
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ADXL346ACCZ-R2 データシート(HTML) 34 Page - Analog Devices |
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34 / 40 page ![]() ADXL346 Data Sheet Writing to the BW_RATE register or placing the part into standby mode resets the orientation feature, clearing the orientation filter and the orientation status. These actions cause an orientation interrupt (if enabled), however, if the orientation during the next output sample is different from the default value (+X for 2D orientation detection and undefined for 3D orientation). DATA FORMATTING OF UPPER DATA RATES Formatting of output data at the 3200 Hz and 1600 Hz output data rates changes depending on the mode of operation (full- resolution or fixed 10-bit) and the selected output range. When using the 3200 Hz or 1600 Hz output data rates in full-resolution or ±2 g, 10-bit operation, the LSB of the output data-word is always 0. When data is right justified, this corresponds to Bit D0 of the DATAx0 register, as shown in Figure 52. When data is left justified and the part is operating in ±2 g, 10-bit mode, the LSB of the output data-word is Bit D6 of the DATAx0 register. In full-resolution operation when data is left justified, the location of the LSB changes according to the selected output range. For a range of ±2 g, the LSB is Bit D6 of the DATAx0 register; for ±4 g, Bit D5 of the DATAx0 register; for ±8 g, Bit D4 of the DATAx0 register; and for ±16 g, Bit D3 of the DATAx0 register. This is shown in Figure 53. The use of 3200 Hz and 1600 Hz output data rates for fixed 10-bit operation in the ±4 g, ±8 g, and ±16 g output ranges provides an LSB that is valid and that changes according to the applied accel- eration. Therefore, in these modes of operation, Bit D0 is not always 0 when output data is right justified, and Bit D6 is not always 0 when output data is left justified. Operation at any data rate of 800 Hz or lower also provides a valid LSB in all ranges and modes that change according to the applied acceleration. 0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 DATAx1 REGISTER DATAx0 REGISTER OUTPUT DATA-WORD FOR ±16g, FULL-RESOLUTION MODE. OUTPUT DATA-WORD FOR THE ±2g, FULL-RESOLUTION AND ALL 10-BIT MODES. THE ±4g AND ±8g FULL-RESOLUTION MODES HAVE THE SAME LSB LOCATION AS THE ±2g AND ±16g FULL-RESOLUTION MODES, BUT THE MSB LOCATION CHANGES TO BIT D2 AND BIT D3 OF THE DATAx1 REGISTER FOR ±4g AND ±8g, RESPECTIVELY. Figure 52. Data Formatting When Output Data Is Right Justified 0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 DATAx1 REGISTER DATAx0 REGISTER MSB FOR ALL MODES OF OPERATION WHEN LEFT JUSTIFIED. LSB FOR ±2g, FULL-RESOLUTION AND ALL 10-BIT MODES. LSB FOR ±4g, FULL-RESOLUTION MODE. LSB FOR ±8g, FULL-RESOLUTION MODE. LSB FOR ±16g, FULL-RESOLUTION MODE. FOR 3200Hz AND 1600Hz OUTPUT DATA RATES, THE LSB IN THESE MODES IS ALWAYS 0. ADDITIONALLY, ANY BITS TO THE RIGHT OF THE LSB ARE ALWAYS 0 WHEN THE OUTPUT DATA IS LEFT JUSTIFIED. Figure 53. Data Formatting When Output Data Is Left Justified Rev. C | Page 34 of 40 |
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