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ADXL346ACCZ-R2 データシート(PDF) 23 Page - Analog Devices

部品番号 ADXL346ACCZ-R2
部品情報  3-Axis, ±2 g/±4 g/±8 g/±16 g Ultralow Power Digital Accelerometer
PDF  40 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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ADXL346ACCZ-R2 データシート(HTML) 23 Page - Analog Devices

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Data Sheet
ADXL346
REGISTER DEFINITIONS
Register 0x00—DEVID (Read Only)
D7
D6
D5
D4
D3
D2
D1
D0
1
1
1
0
0
1
1
0
The DEVID register holds a fixed device ID code of 0xE6
(346 octal).
Register 0x1D—THRESH_TAP (Read/Write)
The THRESH_TAP register is eight bits and holds the threshold
value for tap interrupts. The data format is unsigned, so the
magnitude of the tap event is compared with the value in
THRESH_TAP for normal tap detection. For information on
improved tap detection, refer to the Improved Tap Detection
section. The scale factor is 62.5 mg/LSB (that is, 0xFF = +16 g).
A value of 0 may result in undesirable behavior if single-tap/
double-tap interrupts are enabled.
Register 0x1E, Register 0x1F, Register 0x20—OFSX,
OFSY, OFSZ (Read/Write)
The OFSX, OFSY, and OFSZ registers are each eight bits and
offer user-set offset adjustments in twos complement format
with a scale factor of 15.6 mg/LSB (that is, 0x7F = 2 g). The
values stored in the offset registers are automatically added to
the acceleration data, and the resulting value is stored in the
output data registers. For additional information regarding
offset calibration and the use of the offset registers, refer to the
Offset Calibration section.
Register 0x21—DUR (Read/Write)
The DUR register is eight bits and contains an unsigned time
value representing the maximum time that an event must be
above the THRESH_TAP threshold to qualify as a tap event. For
information on improved tap detection, refer to the Improved Tap
Detection section. The scale factor is 625 µs/LSB. A value of 0
disables the single-tap/double-tap functions.
Register 0x22—Latent (Read/Write)
The latent register is eight bits and contains an unsigned time
value representing the wait time from the detection of a tap
event to the start of the time window (defined by the window
register) during which a possible second tap event can be detected.
For information on improved tap detection, refer to the Improved
Tap Detection section. The scale factor is 1.25 ms/LSB. A value of 0
disables the double-tap function.
Register 0x23—Window (Read/Write)
The window register is eight bits and contains an unsigned time
value representing the amount of time after the expiration of the
latency time (determined by the latent register) during which a
second valid tap can begin. For information on improved tap
detection, refer to the Improved Tap Detection section. The scale
factor is 1.25 ms/LSB. A value of 0 disables the double-tap
function.
Register 0x24—THRESH_ACT (Read/Write)
The THRESH_ACT register is eight bits and holds the threshold
value for detecting activity. The data format is unsigned, so the
magnitude of the activity event is compared with the value in the
THRESH_ACT register. The scale factor is 62.5 mg/LSB. A value
of 0 may result in undesirable behavior if the activity interrupt
is enabled.
Register 0x25—THRESH_INACT (Read/Write)
The THRESH_INACT register is eight bits and holds the threshold
value for detecting inactivity. The data format is unsigned, so the
magnitude of the inactivity event is compared with the value in
the THRESH_INACT register. The scale factor is 62.5 mg/LSB. A
value of 0 may result in undesirable behavior if the inactivity
interrupt is enabled.
Register 0x26—TIME_INACT (Read/Write)
The TIME_INACT register is eight bits and contains an unsigned
time value representing the amount of time that acceleration
must be less than the value in the THRESH_INACT register for
inactivity to be declared. The scale factor is 1 sec/LSB. Unlike
the other interrupt functions, which use unfiltered data (see the
Threshold section), the inactivity function uses filtered output
data. At least one output sample must be generated for the
inactivity interrupt to be triggered. This results in the function
appearing unresponsive if the TIME_INACT register is set to a
value less than the time constant of the output data rate. A value
of 0 results in an interrupt when the output data is less than the
value in the THRESH_INACT register.
Register 0x27—ACT_INACT_CTL (Read/Write)
D7
D6
D5
D4
ACT ac/dc
ACT_X enable
ACT_Y enable
ACT_Z enable
D3
D2
D1
D0
INACT ac/dc
INACT_X enable
INACT_Y enable
INACT_Z enable
ACT AC/DC and INACT AC/DC Bits
A setting of 0 selects dc-coupled operation, and a setting of 1
enables ac-coupled operation. In dc-coupled operation, the
current acceleration magnitude is compared directly with
THRESH_ACT and THRESH_INACT to determine whether
activity or inactivity is detected.
In ac-coupled operation for activity detection, the acceleration
value at the start of activity detection is taken as a reference
value. New samples of acceleration are then compared to this
reference value, and if the magnitude of the difference exceeds
the THRESH_ACT value, the device triggers an activity interrupt.
Similarly, in ac-coupled operation for inactivity detection, a
reference value is used for comparison and is updated whenever
the device exceeds the inactivity threshold. After the reference
value is selected, the device compares the magnitude of the
difference between the reference value and the current acceleration
with THRESH_INACT. If the difference is less than the value in
THRESH_INACT for the time in TIME_INACT, the device is
considered inactive and the inactivity interrupt is triggered.
Rev. C | Page 23 of 40



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