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STV2310 データシート(PDF) 71 Page - STMicroelectronics |
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STV2310 データシート(HTML) 71 Page - STMicroelectronics |
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71 / 112 page ![]() 71/112 STV2310 Register List DDECCONT18 Register Description STI_NB_FIELDS _CONFIRM[2:0] Number of Fields to be Confirmed This bitfield operates on the second stage of the standard identification algorithm: the confirmation stage. It gives the number of consecutive fields where the standard criteria must be OK before the standard identification is confirmed. 000: 1 field 100: 8 fields 001: 3 fields (default) 101: 32 fields 010: 7 fields 110: 45 fields 011: 10 fields 111: 63 fields SPC_OVERLOA D_OFF Cover coefficient forced to 1 The SPC_ACC_OFF and SPC_OVERLOAD_OFF bits are related to the ACC and ACC Overload mechanisms operating on the CVBS flow. These regulating algorithms are a complement to the AGC operating on the CVBS and the Y amplitudes). The ACC and ACC Overload mechanisms operate on the chroma (C) amplitude in the CVBS flow. The ACC (automatic chroma control) operates with the Cburst burst scale factor. The ACC overload mechanism operates with the Cover chroma correction factor. Both Cburst and Cover values are internal variables. The Cover variable carries the maximum chroma value measured during the video line. 0: Cover coefficient is not forced to 1 (Overload mechanism). 1: Cover coefficient is forced to 1. SPC_ACC_OFF Cburst coefficient forced to 1 The Cburst variable carries the input video burst amplitude. When that amplitude is different from the standard, demodulated chroma components are scaled with Cburst. Cburst change rate and change steps are also programmable. See registers DDECCONT20[1:0] = SPC_ACC_KTHBURST[1:0] , DDECCONT20[5:4] = SPC_ACC_NB_LINEUP[1:0] , DDECCONT20[7:6] = SPC_ACC_NB_LINEDW[1:0]. 0: Cburst coefficient is not forced to 1 (ACC. mechanism). 1: Cburst coefficient is forced to 1. Address (hex): 18h Reset Value (bin): 0101 1001 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 BW_SEL[2:0] NONINTER LACED_EN OUT_ RANGE COMB_ MODE Bit Name Function Bit 7 Reserved. Must be set to 0. BW_SEL[2:0] Notch Width Select This register offers the possibility to select the notch width: 000: Notch filter the narrowest 111: Notch filter the widest Bit Name Function |
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