STV2310 datasheet(97/112 Pages) STMICROELECTRONICS

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STV2310

DDECSTAT2

DDECSTAT3

Address (hex): 81h - Read Only

Reset Value (bin): Undefined

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

VLOCK

HLOCK

PLLLOCK

5060ID

TVSTDID

TVSTD[2:0]

Bit Name

Function

VLOCK

Flag used to signal Vertical Synchronization Signal Capture

0: Vsync is not captured

1: Vsync is captured

HLOCK

Flag used to signal Horizontal PLL (detection) lock status

0: HPLL is out of lock

1: HPLL is in lock

PLLLOCK

Flag used to signal Output PLL (line-locked) status

0: Output PLL is out of lock

1: Output PLL is in lock

5060ID

Flag used to signal detection of either 50 Hz or 60 Hz signal

0: 60 Hz signal is detected.

1: 50 Hz signal is detected.

TVSTDID

Flag used to signal that standard is identified

0: Standard is not identified.

1: Standard is identified.

TVSTD[2:0]

Identification (code) of Identified Standard

See the AUTOSTD[5:0] bits in the

DDECCONT1 register.

Address (hex): 82h - Read Only

Reset Value (bin): Undefined

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

VSYNCLOC

_NSTD

BLANKLVL_

SHIFT_DET

ECTED

INTERLACE

D_DETECT

DVD_DETE

CTED

VCR_DETE

CTED

INSER_DET

ECTED

FB_DETEC

TED

TRICKMOD_

DETECTED

Bit Name

Function

VSYNCLOC_

NSTD

The synchronisation block normally detects the input video parity by detecting the Vsync position with

respect to the Hsync. The Vsync position is normally at the beginning of line (0%) or middle of line (50%).

The built-in thresholds for Vsync position are 25% and 75%. When the Vysnc is actually close to these

limits, a bad parity detection may take place. This is the reason for this status bit.

When set, the Vsync is positioned between 20% - 30% OR 70%-80% of input video line.

BLANKLVL_SHIF

T_DETECTED

When set, this bit indicates that the input video blank level is shifted during the VBI. This detection only

takes place when the shift is above a determined threshold and there is a low level of noise.

INTERLACED_

DETECTED

When set, this bit indicates that the input video is interlaced. When reset the input video is non interlaced.

This bit can potentially change value at each input video field

DVD_DETECTED

When set, this bit indicates that a DVD has been detected on the input.

VCR_DETECTED

When set, this bit indicates that a VCR has been detected on the input.

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