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STV2310 データシート(PDF) 79 Page - STMicroelectronics

部品番号 STV2310
部品情報  Multistandard TV Digital Video Decoder with Adaptive Comb Filter and RGB/YCrCb Input
PDF  112 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STV2310 データシート(HTML) 79 Page - STMicroelectronics

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STV2310
Register List
DDECCONT2B
Register Description
DDECCONT2C
Register Description
Bit Name
Function
CLAMP_PROP[1:
0]
Proportional Gain Selection
This register is related to the CVBS clamp regulation algorithm where a PID filter is used. CLAMP_PROP
defines the Proportional Gain selection.
00: Proportional Gain divided by 64
10: Proportional Gain divided by 16
01: Proportional Gain divided by 32
11: Proportional Gain divided by 8
CLAMP_DER[1:0]
Defines the Clamp Derivate selection.
00 : 1
10 : 1/4
01 : 1/2
11 : 0
Bit 3
Reserved. Must be set to 0.
CLAMP_INT[2:0]
Clamp Integral Gain Configuration
This bitfield is related to the CVBS clamp regulation algorithm where a PID filter is used. This bitfield
provides the integral gain selection. The entry is coded as follows:
000: Divided by 64
111: Divided by 5192
Address (hex): 2Bh
Reset Value (bin): 0110 0011
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit Name
Function
Bits [7:0]
Reserved. Must be set to 0110 0011.
Address (hex): 2Ch
Reset Value (bin): 1000 0010
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit Name
Function
Bits [7:0]
Reserved. Must be set to 1000 0010.



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