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AD9520-3/PCBZ データシート(PDF) 81 Page - Analog Devices

部品番号 AD9520-3/PCBZ
部品情報  12 LVPECL/24 CMOS Output Clock Generator with Integrated 2 GHz VCO
PDF  84 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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AD9520-3/PCBZ データシート(HTML) 81 Page - Analog Devices

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AD9520-3
Rev. 0 | Page 81 of 84
Table 60. EEPROM Control
Reg.
Addr
(Hex) Bit(s) Name
Description
B00
[0]
STATUS_EEPROM
(read-only)
This read-only register indicates the status of the data transferred between the EEPROM and the buffer
register bank during the writing and reading of the EEPROM. This signal is also available at the STATUS pin
when 0x01D[7] is set.
[0] = 0; data transfer is done.
[0] = 1; data transfer is not done.
B01
[0]
EEPROM
data error
(read-only)
This read-only register indicates an error during the data transferred between the EEPROM and the buffer.
[0] = 0; no error. Data is correct.
[0] = 1; incorrect data detected.
B02
[1]
Soft_EEPROM
When the EEPROM pin is tied low, setting Soft_EEPROM resets the AD9520 using the settings saved in
EEPROM.
[1] = 1; soft reset with EEPROM settings (self-clearing).
B02
[0]
Enable EEPROM
write
Enables the user to write to the EEPROM.
[0] = 0; EEPROM write protection is enabled. User cannot write to EEPROM (default).
[0] = 1; EEPROM write protection is disabled. User can write to EEPROM.
B03
[0]
REG2EEPROM
Transfers data from the buffer register to the EEPROM (self-clearing).
[0] = 1; setting this bit initiates the data transfer from the buffer register to the EEPROM (writing process);
it is reset by the I²C master after the data transfer is done.



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