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LAN9500AI データシート(PDF) 185 Page - Microchip Technology |
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LAN9500AI データシート(HTML) 185 Page - Microchip Technology |
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185 / 213 page ![]() 2010 - 2015 Microchip Technology Inc. DS00001875A-page 185 LAN950x 7.5.11 SPECIAL CONTROL/STATUS INDICATIONS REGISTER Index (In Decimal): 27 Size: 16 bits Bits Description Type Default 15 Override AUTOMDIX_EN Strap 0 = AUTOMDIX_EN configuration strap enables or disables HP Auto MDIX 1 = Override AUTOMDIX_EN configuration strap. PHY Register 27.14 and 27.13 determine MDIX function R/W 0b 14 Auto-MDIX Enable Only effective when 27.15=1, otherwise ignored. 0 = Disable Auto-MDIX. 27.13 determines normal or reversed connection. 1 = Enable Auto-MDIX. 27.13 must be set to 0. R/W 0b 13 Auto-MDIX State Only effective when 27.15=1, otherwise ignored. When 27.14 = 0 (manually set MDIX state): 0 = no crossover (TPO = output, TPI = input) 1 = crossover (TPO = input, TPI = output) When 27.14 = 1 (automatic MDIX) this bit must be set to 0. Do not use the combination 27.15=1, 27.14=1, 27.13=1. R/W 0b 12:11 RESERVED RO - 10 VCOOFF_LP Forces the Receive PLL 10M to lock on the reference clock at all times: 0 = Receive PLL 10M can lock on reference or line as needed (normal operation). 1 = Receive PLL 10M is locked on the reference clock. In this mode 10M data packets cannot be received. R/W NASR 0b 9:5 RESERVED RO - 4 XPOL Polarity state of the 10BASE-T: 0 = Normal polarity 1 = Reversed polarity RO 0b 3:0 RESERVED RO - |
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