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STW4510 データシート(PDF) 42 Page - STMicroelectronics |
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STW4510 データシート(HTML) 42 Page - STMicroelectronics |
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42 / 57 page ![]() Obsolete Product(s) - Obsolete Product(s) Electrical and timing characteristics STw4510 42/57 Vana(i) (vana(i) with i = 2 or 3) Table 21. LDO regulator - Vana(i) with i=2 or 3 Symbol Description Test conditions Min. Typ. Max. Units Vana3 regulator in high power mode (en_vana3 = 1, SLEEP = ‘0’) VBAT Input power supply Vana(i) = 1.8 V, 2.8 V, 3 V, 3.3 V Max (Vana(i)_out + 0.2, Vbat_min) 3.6 5.5 V VOUT Output voltage Vana(i)_sel[1:0]pads 00 01 10 11 -3 % 1.8 2.8 3.0 3.3 +3 % V IOUT (1) Output current 150 mA ISHORT (1) Short-circuit limitation 230 340 550 mA IQ (2) Quiescent current IOUT = 0 mA 30 µA ILKG Power-down current 1 µA PSRR(1) Power supply rejection Vana(i) = 2.8 V IOUT = 150 mA Vpp = 0.3 V, F: [0; 20] kHz 50 dB Vana(i) = 2.8 V IOUT = 10 mA Vpp = 0.3 V, F: [0; 10] kHz F: [10; 100] kHz 50 45 dB TR Rising time Vana(i) = 2.8 V IOUT = 10 mA 1.5 ms Lir Line regulation VBAT: [2.7; 5.5] V 5 mV Ldr Load regulation IOUT= [0.1; 150] mA 10 mV Lirt Transient line regulation Vana(i) = 2.8 V IOUT = 150 mA VBAT= [3.0; 3.3] V tR = tF = 10 µs 2mV Ldrt Transient load regulation Vana(i) = 2.8 V IOUT= [1; 150] mA tR = tF = 1 µs 20 mV |
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