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SPC58EN80C3RMSBY データシート(PDF) 77 Page - STMicroelectronics

部品番号 SPC58EN80C3RMSBY
部品情報  32-bit Power Architecture microcontroller for automotive ASIL-D applications
PDF  158 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
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SPC58EN80C3RMSBY データシート(HTML) 77 Page - STMicroelectronics

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DS11734 Rev 6
77/158
SPC584Nx, SPC58ENx, SPC58NNx
Electrical characteristics
79
Table 33. MSC/DSPI LVDS transmitter electrical characteristics (1),(2),(3)
Symbol
C
Parameter
Conditions
Value
Unit
Min
Typ
Max
fDATA
SR D
Data rate
—
—
—
80
Mbps
VOS
CC P
Common mode voltage
—
1.08
—
1.32
V
|
ΔVOD|CC P
Differential output voltage swing
(terminated)(4),(5)
—
150
—
400
mV
tTR
CC T
Rise time from -|
ΔVOD(min)| to
+|
ΔVOD(min)|. Fall time from
+|
ΔVOD(min)| to -|ΔVOD(min)|(6)
—
0.8
—
5.8
ns
CL
SR D
External lumped differential load
capacitance(4)
VDD_HV_IO = 4.5 V
—
—
50
pF
VDD_HV_IO = 3.0 V
—
—
39
ILVDS_TX CC C
Transmitter DC current consumption
Enabled
—
—
5.0
mA
IPIN_TX
CC D
Transmitter DC current sourced through
output pin
—
1.5
—
4.0
mA
1. This table is applicable to MSC/DSPI LVDS pads used in MSC configuration (SIUL2_MSCR_IO_n.ODC=100).
2. The MSC and DSPI LVDS pad electrical characteristics are based on the application circuit and typical worst case internal
capacitance values given in Figure 12.
3. All MSC and DSPI LVDS pad electrical characteristics are valid from -40 °C to 165 °C.
4. Valid for maximum data rate fDATA. Value given is the capacitance on each terminal of the differential pair, as shown in
Figure 12.
5. Valid for maximum external load CL.
6. The transition time is measured from 10% to 90% of the voltage transition from -|
ΔVOD|(min) to +|ΔVOD|(min).
Table 34. MSC LVDS transmitter electrical characteristics for LFAST pads. (1),(2),(3)
Symbol
C
Parameter
Conditions
Value
Unit
Min
Typ
Max
fDATA
SR D
Data rate
—
—
—
320
Mbps
VOS
CC P
Common mode voltage
—
1.08
—
1.32
V
|
ΔVOD|CC P
Differential output voltage swing
(terminated)(4),(5)
—
120
—
400
mV
tTR
CC T
Rise time from -|
ΔVOD(min)| to
+|
ΔVOD(min)|. Fall time from
+|
ΔVOD(min)| to -|ΔVOD(min)|(6)
—0.26
—
1.4
ns
CL
SR D
External lumped differential load
capacitance(4)
VDD_HV_IO = 4.5 V
—
—
12.0
pF
VDD_HV_IO = 3.0 V
—
—
8.5
ILVDS_TX CC C
Transmitter DC current consumption
Enabled
—
—
5.0
mA
IPIN_TX
CC D
Transmitter DC current sourced through
output pin
—1.5
4.0
mA
1. This table is applicable to LFAST LVDS pads used in MSC configuration (SIUL2_MSCR_IO_n.ODC=100).
2. The MSC and DSPI LVDS pad electrical characteristics are based on the application circuit and typical worst case internal
capacitance values given in Figure 12.



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