MCP3901A2T-ISLASHSS datasheet(28/60 Pages) MICROCHIP

28 / 60 page

MCP3901

DS22192A-page 28

5.6

ADC OUTPUT CODING

The second order modulator, SINC3 filter, PGA, VREF

and analog input structure all work together to produce

the device transfer function for the analog to digital con-

version, Equation 5-3.

The channel data is either a 16-bit or 24-bit word,

presented

23-bit

15-bit

plus

sign,

two’s

complement format and is MSB (left) justified.

The ADC data is two or three bytes wide depending on

the WIDTH bit of the associated channel. The 16-bit

mode includes a round to the closest 16-bit word

(instead of truncation) in order to improve the accuracy

of the ADC data.

In case of positive saturation (CHn+ - CHn- > VREF/3),

the output is locked to 7FFFFF for 24 bit mode (7FFF

for 16 bit mode). In case of negative saturation (CHn+

- CHn- <-VREF/3), the output code is locked to 800000

for 24-bit mode (8000 for 16 bit mode).

Equation 5-3 is only true for DC inputs. For AC inputs,

this transfer function needs to be multiplied by the

transfer function of the SINC3 filter (see Equation 5-1

and Equation 5-2).

EQUATION 5-3:

5.6.1

ADC RESOLUTION AS A FUNCTION

OF OSR

The ADC resolution is a function of the OSR

(Section 5.5 “SINC3 Filter”). The resolution is the

same for both channels. No matter what the resolution

is, the ADC output data is always presented in 24-bit

words, with added zeros at the end if the OSR is not

large enough to produce 24-bit resolution (left

justification).

DATA_CHn

–

()

REF+

REF-

–

-------------------------------------

⎝⎠

⎛⎞

8,388,608

DATA_CHn

–

()

REF+

REF-

–

-------------------------------------

⎝⎠

⎛⎞

32 768

(For 24-bit Mode Or WIDTH = 1)

(For 16-bit Mode Or WIDTH = 0)

TABLE 5-4:

OSR = 256 OUTPUT CODE EXAMPLES

ADC Output Code (MSB First)

Hexadecimal

Decimal

0111

1111

11 11

1111

11 11

0x7FFFFF

+ 8,388,607

0111

1111

11 11

1111

11 10

0x7FFFFE

+ 8,388,606

0000

00 00

0000

00 00

0x000000

1111

11 11

1111

11 11

0xFFFFFF

-1

1000

0000

00 00

0000

00 01

0x800001

- 8,388,607

1000

0000

00 00

0000

00 00

0x800000

- 8,388,608

TABLE 5-5:

OSR = 128 OUTPUT CODE EXAMPLES

ADC Output Code (MSB First)

Hexadecimal

Decimal

23-bit Resolution

0111

1111

111 1

111 0

0x7FFFFE

+ 4,194,303

0111

1111

111 1

111 0

111 1

110 0

0x7FFFFC

+ 4,194,302

0000

000 0

0x000000

1111

111 1

111 0

0xFFFFFE

-1

1000

0000

000 0

001 0

0x800002

- 4,194,303

1000

0000

000 0

0x800000

- 4,194,304

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