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MCP3901A2T-I/SS データシート(PDF) 38 Page - Microchip Technology

部品番号 MCP3901A2T-I/SS
部品情報  Two Channel Analog Front End
PDF  60 Pages
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メーカー  MICROCHIP [Microchip Technology]
ホームページ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP3901A2T-I/SS データシート(HTML) 38 Page - Microchip Technology

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MCP3901
DS22192A-page 38
© 2009 Microchip Technology Inc.
6.10.2
DR PULSES WITH SHUTDOWN OR
RESET CONDITIONS
There will be no DR pulses if DRMODE<1:0>=00 when
either one or both of the ADCs are in reset or shutdown.
In Mode 00, a DR pulse only happens when both ADCs
are ready. Any DR pulse will correspond to one data on
both ADCs. The two ADCs are linked together and act
as if there was only on channel with the combined data
of both ADCs. This mode is very practical when both
ADC channel data retrieval and processing need to be
synchronized, as in power metering applications.
Figure 6-8 represents the behavior of the data ready
pin with the different DRMODE and DR_LTY configura-
tions, while shutdown or resets are applied.
Note:
If DRMODE<1:0>=11, the user will still be
able to retrieve the DR pulse for the ADC
not in shutdown or reset, i.e. only 1 ADC
channel needs to be awake.



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