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データシートサーチシステム |
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データシートサーチシステム |
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GD25LB64CSIG データシート(PDF) 5 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LB64CSIG データシート(HTML) 5 Page - GigaDevice Semiconductor (Beijing) Inc. |
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5 / 70 page  1.8V Uniform Sector Dual and Quad Serial Flash GD25LB64C 5 2. GENERAL DESCRIPTION The GD25LB64C (64M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and supports the Dual/Quad SPI and QPI mode: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2, and I/O3. The Dual I/O data is transferred with speed of 240Mbits/s and the Quad I/O & Quad output data is transferred with speed of 480Mbits/s. CONNECTION DIAGRAM CS# SO (IO1) IO2 VSS Top View VCC IO3 SCLK SI (IO0) 8–LEAD VSOP/SOP 1 2 3 4 5 6 7 8 Top View 8–LEAD WSON 1 2 3 4 5 6 7 8 CS# VSS VCC SCLK SI/ IO0 SO (IO1) IO2 IO3 PIN DESCRIPTION Pin Name I/O Description CS# I Chip Select Input SO (IO1) I/O Data Output (Data Input Output 1) IO2 I/O Data Input Output 2 VSS Ground SI (IO0) I/O Data Input (Data Input Output 0) SCLK I Serial Clock Input IO3 I/O Data Input Output 3 VCC Power Supply Note: CS# must be driven high if chip is not selected. Please don’t leave CS# floating any time after power is on. |
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