MAC7200 datasheet(23/976 Pages) FREESCALE

23 / 976 page

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

xxiii

23.3.2.7

CRG PLL Control Register (PLLCTL) ...................................................................422

23.3.2.8

CRG DOZE Control Register (SDMCTL) ..............................................................423

23.3.2.9

CRG BDM Control Register (BDMCTL) ...............................................................424

23.4

Functional Description.....................................................................................................424

23.4.1

General.........................................................................................................................424

23.4.2

Functional Blocks ........................................................................................................424

23.4.2.1

Phase Locked Loop (PLL).......................................................................................424

23.4.2.1.1

PLL Operation .....................................................................................................425

23.4.2.1.2

Acquisition and Tracking Modes.........................................................................426

23.4.2.2

System Clocks Generator ........................................................................................427

23.4.2.3

Clock Monitor (CM)................................................................................................428

23.4.2.4

Clock Quality Checker ............................................................................................428

23.4.2.5

Software Watchdog Timer (SWT) ...........................................................................430

23.4.2.6

Real Time Interrupt (RTI)........................................................................................430

23.4.3

Operating Modes..........................................................................................................430

23.4.3.1

Normal Mode...........................................................................................................430

23.4.3.2

Self Clock Mode ......................................................................................................430

23.4.4

Low Power Options .....................................................................................................431

23.4.4.1

Run Mode ................................................................................................................431

23.4.4.2

Doze Mode...............................................................................................................431

23.4.5

Resets ...........................................................................................................................435

23.4.5.1

General.....................................................................................................................435

23.4.5.2

Description of Reset Operation ...............................................................................435

23.4.5.3

JTAG Reset ..............................................................................................................438

23.4.5.4

Clock Monitor Reset................................................................................................438

23.4.5.5

Software Watchdog Timer (SWT) Reset .................................................................438

23.4.5.6

Power On Reset, Low Voltage Reset .......................................................................438

23.4.6

Interrupts......................................................................................................................439

23.4.6.1

General.....................................................................................................................439

23.4.6.2

PLL Lock Interrupt ..................................................................................................440

23.4.6.3

Self Clock Mode Interrupt .......................................................................................440

23.5

CRG Bus Aborts ..............................................................................................................440

23.6

CRG Differences from MAC71xx...................................................................................440

23.7

CRG Application Usage ..................................................................................................441

23.7.1

Enabling the CRG and PLL .........................................................................................441

23.7.2

Crystal Monitor............................................................................................................441

Chapter 24

Oscillator (OSC)

24.1

Introduction......................................................................................................................443

24.1.1

Features........................................................................................................................443

24.1.2

Block diagram..............................................................................................................444

24.1.3

Modes of Operation .....................................................................................................444

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