MAC7200 datasheet(55/976 Pages) FREESCALE

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MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

11-29

Data Trace – Address Range Options ..................................................................................159

11-30

BWC1, BWC2 Field Description ........................................................................................160

11-31

BWC3-6 Field Description ..................................................................................................161

11-32

BWAM Field Description....................................................................................................162

11-33

BWDM Field Description....................................................................................................163

11-34

PCR Field Description .........................................................................................................164

11-35

ARM7 JTAG Instructions....................................................................................................164

11-36

JTAG DR Field Description for Nexus Register Access.....................................................165

11-37

Indirect Branch / Branch History Message Instructions ......................................................168

11-38

Direct Branch Message Instructions ....................................................................................168

11-39

Program Trace Exception Summary ....................................................................................173

11-40

Data Trace Exception Summary ..........................................................................................179

11-41

ARM7 Bus Cycle Cases.......................................................................................................180

11-42

Internal Data Watchpoint Configuration Examples.............................................................182

11-43

Watchpoint Source Description ...........................................................................................183

11-44

JTAG Nexus3 Register Select .............................................................................................184

11-45

JTAG Data Register Field Description ................................................................................185

11-46

JTAG Sequence for Accessing Internal Nexus Registers....................................................191

11-47

JTAG Sequence for Read Access of Memory-Mapped Resources .....................................191

11-48

JTAG Sequence for Write Access of Memory-Mapped Resources ....................................191

12-1

DMA Channel Sources ........................................................................................................194

12-2

eDMA Bus Abort Memory Map..........................................................................................195

12-3

DMA Register Summary .....................................................................................................200

12-4

DMA 32-bit Memory Map...................................................................................................208

12-5

DMACR Field Descriptions ................................................................................................210

12-6

DMAES Field Descriptions .................................................................................................211

12-7

DMAERQH, DMAERQL field Descriptions ......................................................................213

12-8

DMAEEIH, DMAEEIL Field Descriptions.........................................................................215

12-9

DMASERQ Field Descriptions............................................................................................215

12-10

DMACERQ Field Descriptions ...........................................................................................216

12-11

DMASEEI Field Descriptions .............................................................................................216

12-12

DMACEEI Field Descriptions .............................................................................................217

12-13

DMACINT Field Descriptions ............................................................................................218

12-14

DMACERR Field Descriptions ...........................................................................................218

12-15

DMASSRT Field Descriptions ............................................................................................219

12-16

DMACDNE Field Descriptions ...........................................................................................219

12-17

DMAINTH, DMAINTL Field Descriptions........................................................................221

12-18

DMAERRH, DMAERRL Field Descriptions......................................................................222

12-19

DCHPRIn Field Descriptions ..............................................................................................223

12-20

TCDn 32-bit Memory Structure...........................................................................................223

12-21

TCDn Word 0 (TCDn.saddr) Field Description ..................................................................224

12-22

TCDn Word 1 (TCDn.{smod,ssize,dmod,dsize,soff}) Field Descriptions..........................225

12-23

TCDn Word 2 (TCDn.nbytes) Field Description ................................................................226

12-24

TCDn Word 3 (TCDn.slast) Field Descriptions ..................................................................227

12-25

TCDn Word 4 (TCDn.daddr) Field Descriptions ................................................................228

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