MC68HC708AS48 datasheet(99/396 Pages) FREESCALE

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Clock Generator Module (CGM)

Functional Description

MC68HC708AS48 — Rev. 4.0

Advance Information

MOTOROLA

Clock Generator Module (CGM)

8.4 Functional Description

The CGM consists of three major submodules:

•

Crystal oscillator circuit — The crystal oscillator circuit generates

the constant crystal frequency clock, CGMXCLK.

•

Phase-locked loop (PLL) — The PLL generates the

programmable VCO frequency clock CGMVCLK.

•

Base clock selector circuit — This software-controlled circuit

selects either CGMXCLK divided by two or the VCO clock,

CGMVCLK, divided by two as the base clock, CGMOUT. The SIM

derives the system clocks from CGMOUT.

Figure 8-1 shows the structure of the CGM.

8.4.1 Crystal Oscillator Circuit

The crystal oscillator circuit consists of an inverting amplifier and an

external crystal. The OSC1 pin is the input to the amplifier and the OSC2

pin is the output. The SIMOSCEN signal from the system integration

module (SIM) enables the crystal oscillator circuit.

The CGMXCLK signal is the output of the crystal oscillator circuit and

runs at a rate equal to the crystal frequency. CGMXCLK is then buffered

to produce CGMRCLK, the PLL reference clock.

CGMXCLK can be used by other modules which require precise timing

for operation. The duty cycle of CGMXCLK is not guaranteed to be 50%

and depends on external factors, including the crystal and related

external components.

An externally generated clock also can feed the OSC1 pin of the crystal

oscillator circuit. Connect the external clock to the OSC1 pin and let the

OSC2 pin float.

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