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JS28F256P30T85 データシート(PDF) 33 Page - Intel Corporation

部品番号 JS28F256P30T85
部品情報  Intel StrataFlash Embedded Memory
PDF  102 Pages
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メーカー  INTEL [Intel Corporation]
ホームページ  http://www.intel.com
Logo INTEL - Intel Corporation

JS28F256P30T85 データシート(HTML) 33 Page - Intel Corporation

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1-Gbit P30 Family
Datasheet
Intel StrataFlash® Embedded Memory (P30)
April 2005
Order Number: 306666, Revision: 001
33
7.0
AC Characteristics
7.1
AC Test Conditions
Note:
AC test inputs are driven at VCCQ for Logic "1" and 0.0 V for Logic "0." Input/output timing begins/ends
at VCCQ/2. Input rise and fall times (10% to 90%) < 5 ns. Worst case speed occurs at VCC = VCCMin.
NOTES:
1.
See the following table for component values.
2.
Test configuration component value for worst case speed conditions.
3.
CL includes jig capacitance
.
Figure 13.
AC Input/Output Reference Waveform
Input V
CCQ/2
V
CCQ/2 Output
V
CCQ
0V
Test Points
Figure 14.
Transient Equivalent Testing Load Circuit
Device
Under Test
Out
C
L
Table 14.
Test configuration component value for worst case speed conditions
Test Configuration
CL (pF)
VCCQMin Standard Test
30
Figure 15.
Clock Input AC Waveform
CLK [C]
V
IH
V
IL
R203
R202
R201



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