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JS28F256P30T85 データシート(PDF) 50 Page - Intel Corporation |
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JS28F256P30T85 データシート(HTML) 50 Page - Intel Corporation |
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50 / 102 page  1-Gbit P30 Family April 2005 Intel StrataFlash® Embedded Memory (P30) Datasheet 50 Order Number: 306666, Revision: 001 9.2 Device Commands Device operations are initiated by writing specific device commands to the Command User Interface (CUI). See Table 20, “Command Bus Cycles” on page 50. Several commands are used to modify array data including Word Program and Block Erase commands. Writing either command to the CUI initiates a sequence of internally-timed functions that culminate in the completion of the requested task. However, the operation can be aborted by either asserting RST# or by issuing an appropriate suspend command. Table 20. Command Bus Cycles (Sheet 1 of 2) Mode Command Bus Cycles First Bus Cycle Second Bus Cycle Oper Addr(1) Data(2) Oper Addr(1) Data(2) Read Read Array 1 Write DBA 0xFF - - - Read Device Identifier ≥ 2 Write DBA 0x90 Read DBA + IA ID CFI Query ≥ 2 Write DBA 0x98 Read DBA + QA QD Read Status Register 2 Write DBA 0x70 Read DBA SRD Clear Status Register 1 Write DBA 0x50 - - - Program Word Program 2 Write WA 0x40/ 0x10 Write WA WD Buffered Program(3) > 2 Write WA 0xE8 Write WA N - 1 Buffered Enhanced Factory Program (BEFP)(4) > 2 Write WA 0x80 Write WA 0xD0 Erase Block Erase 2 Write BA 0x20 Write BA 0xD0 Suspend Program/Erase Suspend 1 Write DBA 0xB0 - - - Program/Erase Resume 1 Write DBA 0xD0 - - - Block Locking/ Unlocking Lock Block 2 Write BA 0x60 Write BA 0x01 Unlock Block 2 Write BA 0x60 Write BA 0xD0 Lock-down Block 2 Write BA 0x60 Write BA 0x2F |
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