L9803 datasheet(76/126 Pages) STMICROELECTRONICS

部品番号	L9803

部品情報	Super smart power motor driver with 8-Bit MCU, RAM, EEPROM, ADC, WDG, Timers, PWM and H-bridge driver

PDF	126 Pages

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メーカー	STMICROELECTRONICS [STMicroelectronics]

ホームページ	http://www.st.com

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76 / 126 page

On-Chip Peripherals

L9803

76/126

Hardware Blocks

The CAN controller contains the following functional blocks (refer to Figure 37):

●

ST7 Interface: buffering of the ST7 internal bus and address decoding of the CAN

registers.

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TX/RX Buffers: three 10-byte buffers for transmission and reception of maximum length

messages.

●

ID Filters: two 12-bit compare and don’t care masks for message acceptance filtering.

●

PSR: page selection register (see memory map).

●

BRPR: clock divider for different data rates.

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BTR: bit timing register.

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ICR: interrupt control register.

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ISR: interrupt status register.

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CSR: general purpose control/status register.

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TECR: transmit error counter register.

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RECR: receive error counter register.

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BTL: bit timing logic providing programmable bit sampling and bit clock generation for

synchronization of the controller.

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BCDL: bit coding logic generating a NRZ-coded datastream with stuff bits.

●

SHREG: 8-bit shift register for serialization of data to be transmitted and parallelisation

of received data.

●

CRC: 15-bit CRC calculator and checker.

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EML: error detection and management logic.

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CAN Core: CAN 2.0B passive protocol controller.

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